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PMDXB950UPE PDF даташит
| Спецификация PMDXB950UPE изготовлена «NXP Semiconductors» и имеет функцию, называемую «dual P-channel Trench MOSFET». |
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Детали детали
| Номер произв | PMDXB950UPE |
| Описание | dual P-channel Trench MOSFET |
| Производители | NXP Semiconductors |
| логотип |  |
15 Pages
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PMDXB950UPE
20 V, dual P-channel Trench MOSFET
10 September 2013
Product data sheet
1. General description
Dual P-channel enhancement mode Field-Effect Transistor (FET) in a leadless ultra small
DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package using Trench
MOSFET technology.
2. Features and benefits
• Trench MOSFET technology
• Leadless ultra small and ultra thin SMD plastic package: 1.1 × 1.0 × 0.37 mm
• Exposed drain pad for excellent thermal conduction
• ElectroStatic Discharge (ESD) protection > 1 kV HBM
• Drain-source on-state resistance RDSon = 1.02 Ω
3. Applications
• Relay driver
• High-speed line driver
• High-side load switch
• Switching circuits
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Per transistor
VDS drain-source voltage Tj = 25 °C
VGS gate-source voltage
ID
drain current
VGS = -4.5 V; Tamb = 25 °C
Static characteristics (per transistor)
RDSon
drain-source on-state VGS = -4.5 V; ID = -500 mA; Tj = 25 °C
resistance
[1]
Min Typ Max Unit
--
-8 -
--
-20
8
-500
V
V
mA
- 1.02 1.4 Ω
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 1 cm2.
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NXP Semiconductors
PMDXB950UPE
20 V, dual P-channel Trench MOSFET
5. Pinning information
Table 2. Pinning information
Pin Symbol Description
1 S1 source TR1
2 G1 gate TR1
3 D2 drain TR2
4 S2 source TR2
5 G2 gate TR2
6 D1 drain TR1
7 D1 drain TR1
8 D2 drain TR2
Simplified outline
1 76
25
Graphic symbol
D1
G1
8
34
Transparent top view
DFN1010B-6 (SOT1216)
S1
D2
G2
S2
017aaa260
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
PMDXB950UPE
DFN1010B-6
Description
plastic thermal enhanced ultra thin small outline package; no
leads; 6 terminals
Version
SOT1216
7. Marking
Table 4. Marking codes
Type number
PMDXB950UPE
MARKING CODE
(EXAMPLE)
Marking code
10 10 00
READING
DIRECTION
MARK-FREE AREA
PIN 1
INDICATION MARK
READING EXAMPLE:
11
01
10 aaa-007665
Fig. 1. DFN1010B-6 (SOT1216) binary marking code description
PMDXB950UPE
All information provided in this document is subject to legal disclaimers.
Product data sheet
10 September 2013
VENDOR CODE
YEAR DATE
CODE
© NXP N.V. 2013. All rights reserved
2 / 15
Free Datasheet http://www.datasheet4u.com/
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NXP Semiconductors
PMDXB950UPE
20 V, dual P-channel Trench MOSFET
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Per transistor
VDS drain-source voltage Tj = 25 °C
VGS gate-source voltage
ID drain current
VGS = -4.5 V; Tamb = 25 °C
VGS = -4.5 V; Tamb = 100 °C
IDM peak drain current
Tamb = 25 °C; single pulse; tp ≤ 10 µs
Ptot
total power dissipation
Tamb = 25 °C
Source-drain diode
IS source current
Per device
Tj junction temperature
Tamb
ambient temperature
Tstg storage temperature
Tsp = 25 °C
Tamb = 25 °C
[1]
[1]
[2]
[1]
[1]
Min Max Unit
- -20 V
-8 8
V
- -500 mA
- -300 mA
- -2 A
- 265 mW
- 380 mW
- 4025 mW
- -350 mA
-55 150 °C
-55 150 °C
-65 150 °C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 1 cm2.
[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
PMDXB950UPE
Product data sheet
All information provided in this document is subject to legal disclaimers.
10 September 2013
© NXP N.V. 2013. All rights reserved
3 / 15
Free Datasheet http://www.datasheet4u.com/
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| Номер в каталоге | Описание | Производители |
| PMDXB950UPE | dual P-channel Trench MOSFET | NXP Semiconductors |
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