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PDF LPC1102LVUK Data sheet ( Hoja de datos )
| Número de pieza | LPC1102LVUK | |
| Descripción | 32-bit ARM Cortex-M0 MCU | |
| Fabricantes | NXP Semiconductors | |
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LPC111xLV/LPC11xxLVUK
32-bit ARM Cortex-M0 MCU; up to 32 kB flash, 8 kB SRAM;
8-bit ADC
Rev. 2 — 10 October 2012
Product data sheet
1. General description
The LPC111xLV/LPC11xxLVUK is an ARM Cortex-M0-based, low-cost 32-bit MCU family,
designed for 8/16-bit microcontroller applications, offering performance, low power, simple
instruction set and memory addressing together with reduced code size compared to
existing 8/16-bit architectures.
The LPC111xLV/LPC11xxLVUK operate at CPU frequencies of up to 50 MHz.
The peripherals of the LPC111xLV/LPC11xxLVUK include up to 32 kB of flash memory, up
to 8 kB of SRAM data memory, a Fast-mode Plus I2C-bus interface, one SSP/SPI
interface, one UART, four general-purpose counter/timers, an 8-bit ADC, and up to 27
general-purpose I/O pins.
2. Features and benefits
System:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Serial Wire Debug.
System tick timer.
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Memory:
Up to 32 kB on-chip flash programming memory with a 256 byte page erase
function.
Up to 8 kB SRAM.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
Digital peripherals:
Up to 27 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down
resistors and a configurable open-drain mode.
GPIO pins can be used as edge and level sensitive interrupt sources.
High-current output driver on one pin.
High-current sink drivers on two I2C-bus pins in Fast-mode Plus.
Four general-purpose counter/timers with up to 7 capture inputs and 13 match
outputs.
Programmable windowed WDT.
Analog peripherals:
8-bit ADC with input multiplexing among up to 8 pins.
Serial interfaces:
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
NXP Semiconductors
LPC111xLV/LPC11xxLVUK
32-bit ARM Cortex-M0 microcontroller
6. Pinning information
6.1 Pinning
ball A1
index area
LPC1101/02LVUK
12345
A
B
C
D
E
002aag852
Transparent top view
Fig 2. Pin configuration WLCSP25 package
www.DataSheet.net/
LPC111XLV_LPC11XXLVUK
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 October 2012
© NXP B.V. 2012. All rights reserved.
5 of 53
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
NXP Semiconductors
LPC111xLV/LPC11xxLVUK
32-bit ARM Cortex-M0 microcontroller
7. Functional description
7.1 ARM Cortex-M0 processor
The ARM Cortex-M0 is a general purpose, 32-bit microprocessor, which offers high
performance and very low power consumption.
7.2 On-chip flash program memory
The LPC111xLV/LPC11xxLVUK contains up to 32 kB of on-chip flash memory.
The flash memory is divided into 4 kB sectors with each sector consisting of 16 pages.
Individual pages of 256 byte each can be erased using the IAP erase page command.
7.3 On-chip SRAM
The LPC111xLV/LPC11xxLVUK contains up to 8 kB on-chip static RAM memory.
7.4 Memory map
The LPC111xLV/LPC11xxLVUK incorporates several distinct memory regions, shown in
the following figures. Figure 5 shows the overall map of the entire address space from the
user program viewpoint following reset. The interrupt vector area supports address
remapping.
The AHB peripheral area is 2 megabyte in size, and is divided to allow for up to 128
peripherals. The APB peripheral area iswww.DataSheet.net/ 512 kB in size and is divided to allow for up to 32
peripherals. Each peripheral of either type is allocated 16 kilobytes of space. This allows
simplifying the address decoding for each peripheral.
LPC111XLV_LPC11XXLVUK
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 October 2012
© NXP B.V. 2012. All rights reserved.
11 of 53
Datasheet pdf - http://www.DataSheet4U.co.kr/
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