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PDF RTL8139C-LF Data sheet ( Hoja de datos )
| Número de pieza | RTL8139C-LF | |
| Descripción | 3.3V Single-Chip Fast Ethernet Controller | |
| Fabricantes | Realtek Microelectronics | |
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Hay una vista previa y un enlace de descarga de RTL8139C-LF (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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RTL8139C
RTL8139C-LF
RTL8139CL
RTL8139CL-LF
3.3V SINGLE-CHIP FAST ETHERNET
CONTROLLER WITH POWER MANAGEMENT
www.DataSheet.co.kr
DATASHEET
Rev. 1.6
29 December 2005
Track ID: JATR-1076-21
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com.tw
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
RTL8139C(L)
Datasheet
1. General Description
The Realtek RTL8139C(L) is a highly integrated and cost-effective single-chip Fast Ethernet controller
that provides 32-bit performance, PCI bus master capability, and full compliance with IEEE 802.3u
100Base-T specifications and IEEE 802.3x Full Duplex Flow Control. It also supports Advanced
Configuration Power management Interface (ACPI), PCI power management for modern operating
systems that are capable of Operating System Directed Power Management (OSPM) to achieve the most
efficient power management possible. The RTL8139CL is suitable for applications such as CardBus or
mobile devices with a built-in network controller. The CIS data can be stored in either a 93C56 EEPROM
or expansion ROM.
In addition to the ACPI feature, the RTL8139C(L) also supports remote wake-up (including AMD Magic
Packet, LinkChg, and Microsoft wake-up frame) in both ACPI and APM environments. The RTL8139C(L)
is capable of performing an internal reset through the application of auxiliary power. When auxiliary power
is on and the main power remains off, the RTL8139C(L) is ready and waiting for the Magic Packet or Link
Change to wake the system up. Also, the LWAKE pin provides 4 different output signals including active
high, active low, positive pulse, and negative pulse. The versatility of the RTL8139C(L) LWAKE pin
provides motherboards with the Wake-On-LAN (WOL) function. The RTL8139C(L) also supports Analog
Auto-Power-down, that is, the analog part of the RTL8139C(L) can be shut down temporarily according to
user requirements or when the RTL8139C(L) is in a power down state with the wakeup function disabled.
In addition, when the analog part is shut down and the IsolateB pin is low (i.e. the main power is off), then
both the analog and digital parts stop functioning and power consumption of the RTL8139C(L) will be
negligible. The RTL8139C(L) also supports an auxiliary power auto-detect function, and will
auto-configure related bits of their own PCI power management registers in PCI configuration space.
The PCI Vital Product Data (VPD) is also supported to providewww.DataSheet.co.kr the information that uniquely identifies
hardware (i.e., the RTL8139C(L) LAN card). The information may consist of part number, serial number,
and other detailed information.
To provide cost down support, the RTL8139C(L) is capable of using a 25MHz crystal or OSC as its internal
clock source.
The RTL8139C(L) keeps network maintenance costs low and eliminates usage barriers. It is the easiest way
to upgrade a network from 10 to 100Mbps. It also supports full-duplex operation, making 200Mbps
bandwidth possible at no additional cost. To improve compatibility with other brands’ products, the
RTL8139C(L) is also capable of receiving packets with InterFrameGap no less than 40 Bit-Time. The
RTL8139C(L) is highly integrated and requires no “glue” logic or external memory. It includes an interface
for a boot ROM and can be used in diskless workstations, providing maximum network security and ease of
management.
3.3V Single-Chip Fast Ethernet Controller w/Power Management
1
Track ID: JATR-1076-21 Rev. 1.6
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
Symbol
Type
STOPB
RSTB
S/T/S
I
Pin No
20
115
RTL8139C(L)
Datasheet
Description
Space Status register bit 15 (detected parity error) is enabled,
RTL8139C(L) asserts both SERRB pin low and bit 14 of Status register
in Configuration Space.
Stop: Indicates the current target is requesting the master to stop the
current transaction.
Reset: When RSTB is asserted low, the RTL8139C(L) performs an
internal system hardware reset. RSTB must be held for a minimum of
120 ns.
5.3. FLASH/EEPROM Interface
Symbol
MA16-3
MA8
Type
O
I/O
MA6/9356SEL I/O
MA2/EESK
MA1/EEDI
MA0/EEDO
EECS
MD0-7
ROMCSB
OEB
WEB
O
O
O, I
O
I/O
O
O
O
Pin No
70-63, 61, 60, 57,
53-51
61
57
49
48
47
50
108, 107, 105-100
110
88
89
Description
Boot PROM Address Bus: These pins are used to access up to a
128k-byte flash memory or EPROM.
Output pin as part of Boot PROM (or Flash) address bus after PCI reset.
Input pin as Aux. Power detect pin to detect if Aux. Power exists or not,
when initial power-on or PCI reset is asserted. Besides connecting this
pin to Boot PROM, it should be pulled high to the Aux. Power via a
resistor to detect Aux. power. If this pin is not pulled high to Aux.
Power, the RTL8139C(L) assumes that no Aux. power exists. To
support wakeup from ACPI D3cold or APM power-down, this pin must
be pulled high to Aux. power via a resistor.
When this pin is pulled high with a 10KΩ resistor, the 93C56 EEPROM
is used to store the resource data and CIS for the RTL8139C(L). The
RTL8139C(L) latches the status of this pin at power-up to determine
what EEPROM (93C46 or 93C56) is used, afterwards, this pin is used
as MA6.
www.DataSheet.co.kr
The MA2-0 pins are switched to EESK, EEDI, EEDO in 93C46
(93C56) programming or auto-load mode.
93C46 (93C56) chip select
Boot PROM data bus
ROM Chip Select: This is the chip select signal of the Boot PROM.
Output Enable: This enables the output buffer of the Boot PROM or
Flash memory during a read operation.
Write Enable: This signal strobes data into the Flash memory during a
write cycle.
3.3V Single-Chip Fast Ethernet Controller w/Power Management
7
Track ID: JATR-1076-21 Rev. 1.6
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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| PDF Descargar | [ Datasheet RTL8139C-LF.PDF ] | |
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