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7805ALP PDF даташит

Спецификация 7805ALP изготовлена ​​​​«Maxwell Technologies» и имеет функцию, называемую «16-Bit Latchup Protected ADC».

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Номер произв 7805ALP
Описание 16-Bit Latchup Protected ADC
Производители Maxwell Technologies
логотип Maxwell Technologies логотип 

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7805ALP Даташит, Описание, Даташиты
www.DataSheet.co.kr
7805ALP
16-Bit Latchup Protected ADC
Logic Diagram
FEATURES:
• 16-bit organization
• Latchup Protection Technology™
• RAD-PAK® radiation-hardened against natural space radia-
tion
• Total dose hardness:
- > 50 krads(Si), depending upon space mission
• Latchup converted to reset.
- Rate based on cross section and mission.
• Package:
- 28 pin RAD-PAK® flat pack
- 28 pin RAD-PAK® DIP
• 100 kHz min sampling rate
• Standard ± 10V input range
• Advance CMOS technology
- 86 dB min SINAD with 20 kHz input
- Single 5V supply operation
- Utilizes internal or external reference
- Full parallel data output
- Power dissipation: 132 mW max
DESCRIPTION:
Maxwell Technologies’ 7805ALP high-speed analog-to-digital
converter features a greater than 50 krad (Si) total dose toler-
ance, depending upon space mission. Using Mawell’s radia-
tion-hardened RAD-PAK® packaging technology, the 7805ALP
incorporates the commercial ADS7805 from Burr Brown. This
device is latchup protected by Maxwell Technologies’ LPT™
technology. The 7805ALP, 16-bit sampling CMOS A/D . The
device contains a complete 16-bit capacitor-based SAR A/D
with S/H, reference, clock, interface for microprocessor use,
and three-state output drivers. The 7805ALP is specified at a
100 kHz sampling rate, and guaranteed over the full tempera-
ture range. Laser-trimmed scaling resistors provide an indus-
try-standard ± 10V input range, while the innovative design
allows operation from a single 5V supply, with power dissipa-
tion of under 132 mW.
Maxwell Technologies' patented RAD-PAK® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK® provides greater than 50
krad (Si) radiation dose tolerance. This product is available
with screening up to Maxwell Technologies self-defiened
Class K.
01.10.05 Rev 9
(858) 503-3300 Fax: (858) 503-3301- www.maxwell.com
All data sheets are subject to change without notice 1
©2005 Maxwell Technologies
All rights reserved.
Datasheet pdf - http://www.DataSheet4U.net/









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7805ALP Даташит, Описание, Даташиты
www.DataSheet.co.kr
16-Bit Latchup Protected ADC
7805ALP
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NAME
VIN
AGND1
REF
CAP
AGND2
D15 (MSB)
D14
D13
D12
D11
D10
D9
D8
DGND
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
STATUS*
R/C
CS
BUSY
DECPLNG
VS
TABLE 1. 7805ALP PINOUT DESCRIPTION
DIGITAL I/O DESCRIPTION
Analog input.
Analog ground. Used internally as ground reference point.
Reference input/output. 2.2 µ F tantalum capacitor to ground
Reference buffer capacitor. 2.2 µ F tantalum capacitor to ground.
Analog ground.
0 Data bit 15. Most Significant Bit (MSB) of conversion results. When STATUS is
HIGH*, D15 must not be driven high.
0 Data bit 14. When STATUS is HIGH*, D14 must not be driven high.
0 Data bit 13. When STATUS is HIGH*, D13 must not be driven high.
0 Data bit 12. When STATUS is HIGH*, D12 must not be driven high.
0 Data bit 11. When STATUS is HIGH*, D11 must not be driven high.
0 Data bit 10. When STATUS is HIGH*, D10 must not be driven high.
0 Data bit 9. When STATUS is HIGH*, D9 must not be driven high.
0 Data bit 8. When STATUS is HIGH*, D8 must not be driven high.
Digital Ground
0 Data bit 7. When STATUS is HIGH*, D7 must not be driven high.
0 Data bit 6. When STATUS is HIGH*, D6 must not be driven high.
0 Data bit 5. When STATUS is HIGH*, D5 must not be driven high.
0 Data bit 4. When STATUS is HIGH*, D4 must not be driven high.
0 Data bit 3. When STATUS is HIGH*, D3 must not be driven high.
0 Data bit 2. When STATUS is HIGH*, D2 must not be driven high.
0 Data bit 1. When STATUS is HIGH*, D1 must not be driven high.
0 Data bit 0. Least Significant Bit (LSB) of conversion results. When STATUS is
HIGH*, D0 must not be driven high.
0 STATUS when HIGH indicates latchup protection is active and output data is
invalid. Capacitive loading should not exceed 1000 pF.
I With CS LOW and BUSY HIGH, a falling edge of R/C initiates a new conversion.
When STATUS is HIGH*, CS and R/C must not be driven high.
I Internally OR’d with R/C. If R/C LOW, a falling edge on CS initiates a new conver-
sion. When STATUS is HIGH*, CS and R/C must not be driven high.
0 At the start of a conversion, BUSY goes LOW and stays LOW until the conversion
is completed and the digital outputs have been updated.
Supply voltage high speed decoupling pin. Decouple to ground with 1.0 µ F ceramic
capacitor.
Supply input. Nominally 5V. Decouple to ground with 10 µ F tantalum capacitor.
01.10.05 Rev 9
All data sheets are subject to change without notice 2
©2005 Maxwell Technologies
All rights reserved.
Datasheet pdf - http://www.DataSheet4U.net/









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7805ALP Даташит, Описание, Даташиты
www.DataSheet.co.kr
16-Bit Latchup Protected ADC
7805ALP
TABLE 2. 7805ALP ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN
TYP
Analog Inputs
Ground Voltage Difference
Supply Input
Digital Inputs
Thermal Impedance
Internal Power Dissipation
Maximum Junction Temperature
VIN
CAP
REF
DGND
AGND1
AGND2
VS
ΘJC
TJ
-25
VS
9
-0.3
-0.3
-0.3
--
-0.3
--
--
--
--
--
--
--
--
7
--
--
--
MAX
25
AGND2 - 0.3
--
0.3
0.3
0.3
VS + 0.3
11
825
165
UNIT
V
V
V
V
°C/W
mW
°C
PARAMETER
TABLE 3. 7805ALP DC ACCURACY SPECIFICATIONS
(VS = 5V, TA = -40 TO +85°C UNLESS OTHERWISE SPECIFIED)
CONDITIONS
SUBGROUPS
MIN
TYP
MAX UNIT
Integral Linearity Error
Differential Linearity Error
No Missing Codes 1
Transition Noise 2
Full Scale Error 3,4
Full Scale Error Drift
Bipolar Zero Error 3
Bipolar Zero Error Drift
Power Supply Sensitivity
4.8V < VS < 5.25V
-- -- ±3 LSB
-- -- 4, -1 LSB
15 --
-- Bits
-- 1.3 -- LSB
-- -- ±0.5 %
-- ±7 -- ppm/°C
-- -- ±10 mV
-- ±2 -- ppm/°C
-- -- ±8 LSB
1. Guaranteed by design
2. Typical rms noise at worst case transitions and temperatures.
3. Measured with various fixed resistors.
4. Full scale error is worst case - Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided
by the transition voltage (not divided by the full-scale range) and included the effect of offset error.
PARAMETER
VIL
VIH
TABLE 4. 7805ALP DIGITAL INPUTS
(VS = 5V, TA = -40 TO +85°C UNLESS OTHERWISE SPECIFIED)
SUBGROUPS
MIN
1, 2, 3
-0.3
2.0
TYP
--
--
MAX
0.8
VS +0.3
UNIT
V
V
01.10.05 Rev 9
All data sheets are subject to change without notice 3
©2005 Maxwell Technologies
All rights reserved.
Datasheet pdf - http://www.DataSheet4U.net/










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Номер в каталогеОписаниеПроизводители
7805ALP16-Bit Latchup Protected ADCMaxwell Technologies
Maxwell Technologies

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