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PDF SY89546U Data sheet ( Hoja de datos )

Número de pieza SY89546U
Descripción 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER
Fabricantes Micrel Semiconductor 
Logotipo Micrel Semiconductor Logotipo



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Micrel, Inc.
2.5V, 3.2Gbps DIFFERENTIAL 4:1 LVDS
MULTIPLEXER WITH 1:2 FANOUT
AND INTERNAL TERMINATION
Precision Edge®
Precision ESdY8g9e5®46U
SY89546U
FEATURES
„ Selects among four differential inputs
„ Provides two copies of the selected input
„ Guaranteed AC performance over temp and voltage:
• DC-to > 3.2Gbps data rate throughput
• < 620ps In-to-Out tpd
• < 150ps tr/tf
„ Unique input isolation design minimizes crosstalk
„ Ultra-low jitter design:
• < 1psRMS random jitter
• < 10psPP deterministic jitter
• < 10psPP total jitter (clock)
• < 0.7psRMS crosstalk-induced jitter
„ Internal input termination
„ Unique input termination and VT pin accepts DC-
coupled and AC-coupled inputs (LVDS, LVPECL,
CML)
„ 350mV LVDS output swing
„ Power supply 2.5V ±5%
„ –40°C to +85°C temperature range
„ Available in 32-pin (5mm x 5mm) MLF® package
APPLICATIONS
„ SONET/SDH multi-channel select applications
„ Fibre Channel applications
„ GigE applications
TYPICAL PERFORMANCE
Output Amplitude
vs. Frequency
400
350
300
250
200
150
100
50
00 1000 2000 3000 4000 5000 6000
FREQUENCY (MHz)
Precision Edge®
DESCRIPTION
The SY89546U is a precision, high-speed 4:1 differential
multiplexer that provides two copies of the selected input.
The high speed LVDS (350mV) compatible outputs with a
guaranteed throughput of up to 3.2Gbps over temperature
and voltage.
The SY89546U differential inputs include Micrel’s unique,
3-pin internal termination design that allows access to the
termination network through a VT pin. This feature allows
the device to easily interface to different logic standards,
both AC- and DC-coupled without external resistor-bias and
termination networks. The result is a clean, stub-free, low
jitter interface solution.
The SY89546U operates from a single 2.5V supply, and
is guaranteed over the full industrial temperature range
(–40°C to +85°C). For applications that require a 3.3V supply,
consider the SY89547L. Or, for applications that only require
one differential output, consider the SY89544U or SY89545L.
The SY89546U is part of Micrel’s Precision Edge® product
family.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
FUNCTIONAL BLOCK DIAGRAM
IN0
50
VT0
50
/IN0
IN1
50
VT1
50
/IN1
IN2
50
VT2
50
/IN2
IN3
50
VT3
50
/IN3
4:1 MUX
0
1:2 Fanout
1
MUX
2
S1
3 S0
Q0
/Q0
LVDS
Q1
/Q1
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
M9999-082407
[email protected] or (408) 955-1690
1
SEL0 (CMOS/TTL)
SEL1 (CMOS/TTL)
Rev.: C Amendment: /0
Issue Date: August 2007
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SY89546U pdf
www.DataSheet.co.kr
Micrel, Inc.
Precision Edge®
SY89546U
AC ELECTRICAL CHARACTERISTICS(10)
VCC = 2.5V ±5%; TA = –40°C to +85°C; RL = 100ý across Q and /Q, unless otherwise stated.
Symbol
Parameter
Condition
fMAX
tpd
Maximum Operating Frequency
Differential Propagation Delay
VOUT ž 200mV
IN-to-Q
SEL-to-Q
NRZ Data
Clock
tSKEW
Input-to-Input Skew Note 11
Output-to-Output Skew Note 12
Part-to-Part Skew Note 13
tJITTER
Data
Random Jitter (RJ) Note 14
Deterministic Jitter (DJ) Note 15
Clock
Total Jitter (TJ) Note 16
Cycle-to-Cycle Jitter Note 17
Crosstalk
Crosstalk-Induced Jitter
Note 18
tr, tf Output Rise / Fall Time
(20% to 80%)
At full output swing
Min Typ Max Units
3.2 Gbps
4 GHz
330 430 530
ps
200 400 700
ps
4 20 ps
8 20 ps
200 ps
1 psRMS
10 psPP
10 psPP
1 psRMS
0.7 psRMS
35 80 150 ps
Notes:
10. Measured with 100mV input swing. See “Timing Diagrams” section for definition of parameters. High frequency AC parameters are guaranteed by
design and characterization.
11. Input-to-input skew is the difference in time from an input-to-output in comparison to any other input-to-output. In addition, the input-to-input skew
does not include the output skew.
12. Output-to-output skew is measured between two different outputs under identical input transitions.
13. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs. Total skew is calculated as the RMS (Root Mean Square) of the input skew and output skew.
14. Random jitter is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 3.2Gbps.
15. Deterministic jitter is measured at 1.25Gbps and 3.2Gbps, with both K28.5 and 223–1 PRBS pattern.
16. Total jitter definition: with an ideal clock input of frequency - fMAX, no more than one output edge in 1012 output edges will deviate by more than the
specified peak-to-peak jitter value.
17. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output
signal.
18. Crosstalk is measured at the output while applying two similar clock frequencies to adjacent inputs that are asynchronous with respect to each other
at the inputs.
M9999-082407
[email protected] or (408) 955-1690
5
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