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Número de pieza | SIL164 | |
Descripción | PanelLink Transmitter | |
Fabricantes | Silicon Image | |
Logotipo | ||
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®
Technology
SiI 164
PanelLink Transmitter
Data Sheet
Document # SiI-DS-0021-D.doc
Datasheet pdf - http://www.DataSheet4U.net/
1 page www.DataSheet.co.kr
SiI 164 PanelLink Transmitter
Data Sheet
General Description
The SiI 164 transmitter uses PanelLink® Digital
technology to support displays ranging from VGA to
UXGA resolutions (25 - 165Mpps) in a single link
interface.
The SiI 164 transmitter has a highly flexible interface
with either a 12-bit mode (½ pixel per clock edge) or
24-bit mode 1 pixel per clock edge input for true color
(16.7 million) support. In 24-bit mode, the SiI 164
supports single or dual edge clocking. In 12-bit mode,
the SiI164 supports dual edge single clocking or
single edge dual clocking. The SiI 164 can be
programmed though an I2C interface. In addition the
SiI 164 also supports Receiver and Hot Plug
Detection.
PanelLink Digital technology simplifies PC design by
resolving many of the system level issues associated
with high-speed mixed signal design, providing the
system designer with a digital interface solution that is
quicker to market and lower in cost.
SiI 164 Pin Diagram
September 2002
Features
• Scaleable Bandwidth: 25 - 165MHz Flexible
• Graphics Controller Interface: 12-bit or 24-bit
mode 1 pixel/clock inputs
• Flexible Input Clocking: Single clock single
edge (24-bit), Single clock dual edge (12-/24-
bit), Dual clock single edge (12-bit)
• I2C Slave Programming Interface up to 100kHz
• Low Voltage Interface: 3.3V with option for 1.0
to 3.0V Low Voltage Signal Mode
• Monitor Detection supported through hot plug
and receiver detection
• De-skewing Option varies input clock to input
data timing
• Low Power: 3.3V operation (120mA max.) and
Power Down mode (1mA max.)
• Cable Distance Support: over 5m with twisted
pair and fiber-optics ready
• Compliant with DVI 1.0 (DVI is backwards
compliant with VESA® P&DTM and DFP)
• Standard and Pb-free packages (see pg 29)
VCC
RESERVED
DKEN
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
GND
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SiI 164
64-Pin TQFP
(Top View)
16 GND
15 BSEL/SCL
14 DSEL/SDA
13 ISEL/RST#
12 VCC
11 MSEN
10 PD#
9 EDGE/HTPLG
8 CTL1/A1/DK1
7 CTL2/A2/DK2
6 CTL3/A3/DK3
5 VSYNC
4 HSYNC
3 VREF
2 DE
1 VCC
Figure 1. Pin Diagram for SiI 164
1
SiI-DS-0021-D
Datasheet pdf - http://www.DataSheet4U.net/
5 Page www.DataSheet.co.kr
SiI 164 PanelLink Transmitter
Data Sheet
Input Timing Diagrams
2.0 V
TCIH
TCIP
2.0 V
2.0 V
0.8 V
0.8 V
TCIL
Figure 3. Clock Cycle High/Low Times
SLHT
SHLT
80% VOD
20% VOD
Figure 4. Low Swing Differential Times
VCC
ISEL/RST#
TRESET
Figure 5. ISEL/RST# Minimum Timing
7
SiI-DS-0021-D
Datasheet pdf - http://www.DataSheet4U.net/
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet SIL164.PDF ] |
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