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PDF MT6318 Data sheet ( Hoja de datos )

Número de pieza MT6318
Descripción PMIC Specification / power management system chip
Fabricantes MediaTek 
Logotipo MediaTek Logotipo



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MediaTek
MT6318 PMIC Specification
聯發機密不得洩漏
Datasheet
www.DataSheet.in
Document Number:
Preliminary (Released) Information
Revision: 1.0
Release Date: Oct. 11, 2006

1 page




MT6318 pdf
Preliminary Information
MT6318 PMIC Specification
MTK Confidential A (機密)
Datasheet
Index of Figures.......................................................................................................................................................... 62
Index of Tables............................................................................................................................................................ 63
MediaTek Confidential
Revision 1.0 – Oct 11, 2006
Page 5 of 64
© 2005-2006 MediaTek, Inc.
The information contained in this document cannot be distributed or reproduced without the prior written permission of MediaTek, Inc.
www.DataSheet.in

5 Page





MT6318 arduino
Preliminary Information
Reset Generator
Output High
Output Low
Output Current
On Delay Time per Unit Capacitance
Power Key Input
High Voltage
Low Voltage
Control Input Voltage
PWRBB Input High
PWRBB Input Low
Other Control Input High
Other Control Input Low
Thermal Shutdown
Threshold
Hysteresis
LDO Enable Response Time
MT6318 PMIC Specification
MTK Confidential A (機密)
Datasheet
VIO-0.5
1.5
1
2.5
V
0.3 V
mA
4 ms/nF
0.7*VBAT
0.3*VBAT
V
V
1.0 V
0.2 V
2.0 V
0.5 V
150 degree
40 degree
250 µs
2.4 Regulator Output
Table 5: Regulator Specifications
Parameter
Conditions
Charge Pump Regulator – For keypad and RGB LED drivers
Output ripple
Efficiency
Switching frequency
Output current
Response time: rising
Response time: falling
Start-up Time
Feedback voltage
DC/DC Converter
Iout = 80 mA, Vout = 4.5 V
Normal load
No load
LEDKP ON (80mA load)
LEDKP OFF (80mA load)
Efficiency
Switch on max. Duty cycle
Switching frequency
Voltage for BL FET current sense
(CS_BL)
Feedback voltage (FB_BL)
Over-voltage threshold (DC_OV)
Digital Core Voltage
Output voltage (V_D)
6 LEDs’ load
L to H
H to L
VD_SEL=L &
PWR_SAVE_SPI=H
Min.
150
65
675
0.13
0.35
0.95
0.75
Typical
±50
62
900
80
2
1.5
90
250
200
85
75
900
0.15
0.4
1.0
0.8
0.9
Max.
250
85
1180
0.23
0.65
1.05
0.85
Unit
mV
%
kHz
mA
mA
µs
µs
µs
mV
%
%
kHz
V
V
V
V
V
MediaTek Confidential
Revision 1.0 – Oct 11, 2006
Page 11 of 64
© 2005-2006 MediaTek, Inc.
The information contained in this document cannot be distributed or reproduced without the prior written permission of MediaTek, Inc.
www.DataSheet.in

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