LM2772 PDF даташит
Спецификация LM2772 изготовлена «National Semiconductor» и имеет функцию, называемую «Low-Ripple Switched Capacitor Step-Down Regulator». |
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Детали детали
Номер произв | LM2772 |
Описание | Low-Ripple Switched Capacitor Step-Down Regulator |
Производители | National Semiconductor |
логотип |
12 Pages
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December 2006
LM2772
Low-Ripple Switched Capacitor Step-Down Regulator
General Description
The LM2772 is a switched capacitor step-down regulator that
produces a 1.2V output. It is capable of supplying loads up to
150mA with 3% output voltage regulation over line, load, and
temperature. The LM2772 operates with an input voltage from
3.0V to 5.5V, accommodating 1-cell Li-Ion batteries and
chargers.
The LM2772 utilizes a highly efficient regulated multi-gain
charge pump. Pre-regulated 1.1MHz fixed-frequency switch-
ing results in very low ripple and noise on both the input and
the output. When output currents are low, the part automati-
cally switches to a low-ripple PFM regulation mode to main-
tain high efficiency over the entire load range.
The LM2772 is available in National’s 10-pad Leadless Lead-
frame No-Pullback Package (LLP-10).
Features
■ Low-Noise Fixed Frequency Operation
■ 1.2V Output Voltage
■ 3% Output Voltage Regulation
■ Li-Ion (3.6V) to 1.2V with 80% Efficiency
■ Very Low Output Ripple: 8mV @ 150mA
■ Output Currents up to 150mA
■ 2.7V to 5.5V Input Voltage Range
■ Shutdown Disconnects Load from VIN
■ 1.1MHz Switching Frequency
■ No Inductors…Small Solution Size
■ Short Circuit and Thermal Protection
■ LLP-10 Package (3mm × 3mm × 0.8mm)
Applications
■ DSP, Memory, and Microprocessor Power Supplies
■ Mobile Phones and Pagers
■ Portable Electronic Devices
Typical Application Circuit
LM2772 Efficiency vs.
Low-Dropout Linear Regulator (LDO) Efficiency
20216401
© 2007 National Semiconductor Corporation 202164
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20216413
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Connection Diagram and Package Mark Information
10-Pin Non-Pullback Leadless Frame Package (LLP-10)
National Semiconductor Package Number SDA10A
Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
9
10
Name
VIN
GND
VOUT
C3-
C3+
C2-
C2+
C1-
C1+
EN
20216402
Description
Input Voltage: Recommended VIN operating range 3.0V to 5.5V.
Ground
Output Voltage
Flying Capacitor 3: Negative Terminal
Flying Capacitor 3: Positive Terminal
Flying Capacitor 2: Negative Terminal
Flying Capacitor 2: Positive Terminal
Flying Capacitor 1: Negative Terminal
Flying Capacitor 1: Positive Terminal
Enable Pin Logic Input. Applying a logic HIGH voltage signal enables the part. A logic LOW
voltage signal places the the device in shutdown.
Order Information
Output Voltages
1.2V
Order Number
LM2772SD
1.2V
LM2772SDX
Package Mark ID
XXXXX = ¢Z¢2¢X
YYYYY = L2772
XXXXX = ¢Z¢2¢X
YYYYY = L2772
Package
SDA10A
Non-Pullback LLP
Supplied as:
1000 Units, Tape and
Reel
4500 Units, Tape and
Reel
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Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN Pin Voltage
EN Pin Voltage
Continuous Power Dissipation
(Note 3)
Junction Temperature (TJ-MAX)
Storage Temperature Range
Maximum Lead Temperature
(Note 4)
ESD Rating (Note 5)
Human Body Model:
-0.3V to 6.0V
-0.3V to (VIN+0.3V)
w/ 6.0V max
Internally Limited
150ºC
-65ºC to +150º C
265ºC
2.0kV
Operating Ratings
(Notes 1, 2)
Input Voltage Range
Recommended Load Current Range
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(Note 6)
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θJA), LLP10 Package
(Note 7)
2.7V to 5.5V
0mA to 150mA
-30°C to +110°C
-30°C to +85°C
55°C/W
Electrical Characteristics (Notes 2, 8)
Limits in standard typeface are for TJ = 25ºC. Limits in boldface type apply over the full operating junction temperature range (-30°
C ≤ TJ ≤ +110°C) . Unless otherwise noted, specifications apply to the LM2772 Typical Application Circuit (pg. 1) with: VIN = 3.6V;
V(EN) = 1.8V, CIN = C1 = C2 = C3 = 1.0µF, COUT = 4.7µF. (Note 9)
Symbol
Parameter
Condition
Min Typ Max Units
VOUT
1.2V Output Voltage Regulation
3.0V ≤ VIN ≤ 5.5V
0mA ≤ IOUT ≤ 150mA
0mA ≤ IOUT ≤ 150mA
1.164 1.2 1.236
(−3%)
(+3%)
1.178
(−1.8%)
1.2
1.236
(+3.0%)
V
VOUT/IOUT
VOUT/VIN
E
Output Load Regulation
Output Line Regulation
Power Efficiency
IQ Quiescent Supply Current
0mA ≤ IOUT ≤ 150mA
IOUT = 150mA
IOUT = 0mA
(Note 10)
0.15 mV/mA
0.2 %/V
80 %
47 50
µA
VR
VR–PFM
ISD
FSW
ICL
tON
VIL
VIH
IIH
Fixed Frequency Output Ripple
PFM–Mode Output Ripple
Shutdown Current
Switching Frequency
Output Current Limit
Turn-on Time
Logic-low Input Voltage
Logic-high Input Voltage
Logic-high Input Current
40mA ≤ IOUT ≤ 150mA
IOUT < 40mA
V(EN) = 0V
3.0V ≤ VIN ≤ 5.5V
VIN = 5.5V
0V ≤ VOUT ≤ 0.2V
3.0V ≤ VIN ≤ 5.5V
3.0V ≤ VIN ≤ 5.5V
V(EN) = 1.8V
(Note 11)
8 mV
12 mV
0.01 0.3
µA
0.80 1.15 1.50 MHz
500 mA
150
0 0.63
1.1 VIN
5
µs
V
V
µA
IIL Logic-low Input Current Logic Input = 0V
0.01 µA
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150ºC (typ.) and disengages at
TJ=140ºC (typ.).
Note 4: For detailed information on soldering requirements and recommendations, please refer to National Semiconductor's Application Note 1187 (AN-1187):
Leadless Leadframe Package (LLP).
Note 5: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. MIL-STD-883 3015.7
Note 6: Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 110ºC), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
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