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PDF 73S8009R Data sheet ( Hoja de datos )

Número de pieza 73S8009R
Descripción Low Cost Versatile Smart Card Interface
Fabricantes Teridian Semiconductor 
Logotipo Teridian Semiconductor Logotipo



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No Preview Available ! 73S8009R Hoja de datos, Descripción, Manual

Simplifying System Integration™
DS_8009R_056
73S8009Rwww.DataSheet4U.com
Low Cost Versatile Smart Card
Interface
DATA SHEET
October 2009
DESCRIPTION
The 73S8009R is a very low-cost level shifter, single
smart card (ICC) interface IC. The device includes a
level shifter interface between a 3.3 V (typical) logic
circuitry (host microcontroller) and an ISO-7816 /
EMV smart card. The 73S8009R is designed to
provide full electrical compliance with ISO-7816-3
EMV4.1 (EMV2000) and GSM11-11 specifications.
In normal operating mode, for maximum designer
flexibility, the host microcontroller is responsible for
card activation and deactivation. The 73S8009R
incorporates an ISO-7816-3 deactivation sequencer
that controls the card signals in case of fault detection
and card removal. Card presence and faults are
reported to the host through an interrupt output.
When the 73S8009R is ready to support a card with
the selected voltage, a RDY signal informs the host it
can initiate the card activation sequence.
The 73S8009R supports 5V, 3V and 1.8V cards.
Selection is done through 2 dedicated digital inputs.
Level-shifters drive the card signals with the selected
card voltage coming from an internal Low Drop-Out
(LDO) voltage regulator. The LDO regulator is
powered by a dedicated power supply input, VPC.
Digital circuitry is separately powered by a digital
power supply, VDD.
Emergency card deactivation is initiated upon card
extraction or any fault generated by the protection
circuitry. The fault can be a card over-current, a VDD
(digital power), a VPC (regulator power), a VCC
(card power output) or an over-heating fault.
A chip select digital input drives internal latches that
allow the host controller to control multiple
73S8009R ICs in parallel. A power down digital
input also allows the host microcontroller to place
the IC in a very low-power mode making the
73S8009R particularly suitable for low-power and
battery-powered applications.
Auxiliary I/O lines are also available (SO28 package
only) and make the 73S8009R suitable for all kind
of cards, including synchronous (memory) cards.
APPLICATIONS
Set-Top-Box Conditional Access and
Pay-per-View
SIM card readers in DECT and GSM phones,
GPRS, WIFI and VOIP devices
Point of Sales & Transaction Terminals
General purpose smart card readers
ADVANTAGES
Lowest cost smart card interface IC on the
market
Ideal to replace discrete designs in POS
terminals and Set-Top-Boxes
Traditional step-up converter is replaced by
an LDO regulator
Greatly reduced power dissipation
Fewer external components are required
Better noise performance
Very low power dissipation
Small format (4x4x0.8 mm) QFN20 package
option
FEATURES
Card Interface:
Complies with ISO-7816-3, EMV 4.0 and
GSM 11-11 specifications
An LDO voltage regulator provides 1.8V /
3V / 5V to the card from an external power
supply input
Provides at least 90 mA to the card
ISO-7816-3 card emergency deactivation
sequencer
Protection includes 3 voltage supervisors
that detect voltage drops on VCC (card), VDD
(digital) and VPC (regulator) power supplies
Over-current detection, 150 mA max.
2 card detection inputs, 1 for each user
polarity
Auxiliary I/O lines for C4 / C8 contact
signals
Card CLK clock frequency up to 20 MHz
Rev. 1.3
© 2009 Teridian Semiconductor Corporation
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73S8009R pdf
DS_8009R_056
73S8009RwwDwa.DtaataSShheeete4Ut .com
1 Pinout
The 73S8009R is supplied as a 20-pin QFN package and as a 28-pin SO package.
I/OUC 1
CMDVCC% 2
CMDVCC# 3
RSTIN 4
CLKIN 5
TERIDIAN
73S8009R
15 I/O
14 VCC
13 RST
12 GND
11 CLK
Figure 2: 73S8009R 20-Pin QFN Pinout
CS
TEST1
N/C
OFF
I/OUC
AUX1UC
AUX2UC
CMDVCC%
CMDVCC#
RSTIN
CLKIN
RDY
PWRDN
TEST2
(Top View)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VDD
27 GND
26 PRES
25 I/O
24 AUX1
23 AUX2
22 VCC
21 RST
20 GND
19 CLK
18 N/C
17 N/C
16 PRES
15 VPC
Figure 3: 73S8009R 28-Pin SO Pinout
Rev. 1.3
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73S8009R arduino
DS_8009R_056
73S8009RwwDwa.DtaataSShheeete4Ut .com
Symbol
Parameter
Condition
Reset and Clock for card interface, RST, CLK
VOH
VOL
VINACT
IRST_LIM
ICLK_LIM
CLKSR3V
CLKSR5V
tR, tF
Output level, high
Output level, low
Output voltage when
outside of session
Output current limit, RST
Output current limit, CLK
CLK slew rate
CLK slew rate
Output rise time, fall time
IOH = -200 µA
IOL = 200 µA
IOL = 0
IOL = 1 mA
VCC = 3 V
VCC = 5 V
CL = 35 pF for CLK,
10% to 90%
CL = 200 pF for RST,
10% to 90%
δ Duty cycle for CLK CL =35 pF, FCLK 20 MHz
Min
0.9 * VCC
0
0.3
0.5
45
Nom Max
– VCC
– 0.15*VCC
– 0.1
– 0.3
– 30
– 70
––
––
–8
– 100
– 55
Unit
V
V
V
V
mA
mA
V/ns
V/ns
ns
%
2.4 Digital Signals Characteristics
Table 5 lists the 73S8009R digital signals characteristics.
Table 5: Digital Signals Characteristics
Symbol Parameter
Digital I/O except for OSC I/O
VIL
VIH
VOL
VOH
ROUT
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Pull-up resistor; OFF, RDY
|IIL1| Input leakage current
Condition
IOL = 2 mA
IOH = -1 mA
GND < VIN < VDD
Min Nom Max
-0.3 – 0.8
1.8 – VDD+0.3
– – 0.45
VDD-0.45
20
–5
Unit
V
V
V
V
k
μA
2.5 DC Characteristics
Table 6 lists the DC characteristics.
Symbol
Parameter
IDD Supply current
IPC Supply current
IPCOFF
VPC supply current
when VCC = 0
Table 6: DC Characteristics
Condition
Normal operation
Power down
VCC on, ICC = 0 , I/O, AUX1,
AUX2 = high, CLK not toggling
Power down
CMDVCC is high
Min
Nom
700
450
Max
1500
5
650
Unit
µA
µA
–5
345 550 µA
Rev. 1.3
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