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PDF TFA9879 Data sheet ( Hoja de datos )
| Número de pieza | TFA9879 | |
| Descripción | Mono BTL class-D audio amplifier for portable applications | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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TFA9879
Mono BTL class-D audio amplifier for portable applications
with digital input
Rev. 01 — 8 April 2010
Preliminary data sheet
1. Introduction
The TFA9879 is a high-efficiency filter-free mono class-D audio amplifier with two
separate digital inputs for mobile applications.
2. General description
The TFA9879 contains a processor that supports a range of sound processing features
including a 5-band parametric equalizer, separate bass and treble control, a dynamic
range compressor, soft clip control and volume control. Excellent audio performance
combined with high Power Supply Rejection Ratio (PSRR) is achieved through the use of
a closed loop configuration.
Two independent digital audio inputs (I2S / PCM / IOM2) are available for connecting both
a baseband and a multimedia processor.
The TFA9879 is available in a HVQFN24 package.
3. Features and benefits
3.1 General features
Closed loop amplifier for:
High power supply rejection ratio
Excellent audio performance
Digital input for high RF immunity
High efficiency for maximizing battery life
Wide supply voltage range (fully operational from 2.5 V to 5.5 V)
Delivers high output power into 4 and 8 load impedances
Phase-Locked Loop (PLL); no system clock required
Protection including diagnostics via I2C-bus:
OverCurrent Protection (OCP) to protect against short circuits across the speaker,
to the supply line or to ground
OverTemperature Protection (OTP)
Digital inputs protected with UnderFrequency Protection (UFP), OverFrequency
Protection (OFP) and Invalid Bit-clock Protection (IBP)
‘Pop noise’ free at power-up/power down, during sample rate switching and when
switching between digital inputs
Four separate I2C addresses for multi-channel applications
1 page  
NXP Semiconductors
8. Pinning information
8.1 Pinning
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TFA9879
Mono BTL class-D audio amplifier with digital input
terminal 1
index area
SDA
SCL
TEST1
ADSEL2
TEST3
n.c.
1
2
3
4
5
6
TFA9879
DAP(1)
18 SCK2
17 SDI2
16 ADSEL1
15 TEST2
14 n.c.
13 STABA
Transparent top view
(1) Exposed Die Attach Paddle (DAP)
Fig 2. Pin configuration
010aaa582
8.2 Pin description
Table 3.
Symbol
SDA
SCL
TEST1
ADSEL2
TEST3
n.c.
VDDP
OUTB
OUTA
GNDP
STABA
n.c
TEST2
ADSEL1
SDI2
SCK2
LRCK2
SDI1
SCK1
LRCK1
Pin description
Pin Pin Type Description
1 IO
I2C-bus data input/output
2I
I2C-bus bit clock input
3I
test signal input 1; for test purposes only; connect to PCB ground
4I
address selection input 2
5I
test signal input 3; for test purposes only; connect to PCB ground
6-
not connected; connect to PCB ground
7, 8 P
analog supply voltage (2.5 V to 5.5 V)
9O
output B (negative)
10 O
output A (positive)
11, 12 P
analog ground, PCB ground reference
13 O
1.8 V analog stabilizer output
14 -
not connected; connect to PCB ground
15 I
test signal input 2; for test purposes only; connect to PCB ground
16 I
address selection input 1
17 I
digital audio data input 2
18 I
digital audio bit clock input 2
19 I
digital audio word select input 2
20 I
digital audio data input 1
21 I
digital audio bit clock input 1
22 I
digital audio word select input 1
TFA9879_1
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 8 April 2010
© NXP B.V. 2010. All rights reserved.
5 of 60
5 Page 
NXP Semiconductors
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TFA9879
Mono BTL class-D audio amplifier with digital input
9.2 Digital Signal Processor (DSP) features
9.2.1 Serial interface selection
The TFA9879 contains two serial interfaces. The active interface is selected via bit
INPUT_SEL in the Device control register (see Table 21). When this bit is toggled, the
following sequence is initiated:
• Soft mute is activated for 128/fs seconds
• The TFA9879 switches to Off mode and the serial interface input is toggled
• The TFA9879 switches back to Operating mode and soft mute is released
9.2.2 Mono selection
Mono selection is used to select the digital audio input channel to be amplified. The
options are:
• Left channel
• Right channel
• Left + right channels (sum divided by two)
Separate Mono selection is provided for the two serial interfaces via bits MONO_SEL in
the Serial interface control registers (addresses 01h and 03h; see Table 22).
9.2.3 Programmable high-pass filter
The TFA9879 features a first-order high-pass filter on the digital audio input to block DC
and low frequency signals. DC values at the output can damage the speaker.
The high-pass filter cut-off frequency is determined by:
• The high-pass filter control setting (bits HP_CTRL, see Table 30)
• The sample frequency, fs
The relationship between these parameters and the cut-off frequency is defined in
Equation 1:
–fs
ln
4---0---9----6----–---4-H--0---P9---6-_----C----T----R----L-
fhigh–3dB
=
---------------------------------------------------------------------
2
(1)
HP_CTRL can be programmed to any integer value between 0 and 511 (see Table 30).
The high-pass filter is bypassed if HP_CTRL = 0 or bit HPF_BP in the Bypass control
register is set to 1 (see Table 27).
9.2.4 De-emphasis
Digital de-emphasis is sometimes needed, especially with older recordings. Emphasis
and de-emphasis originate in the FM transmission, in which the Signal-to-Noise Ratio
(SNR) is not flat over the signal band (in fact the SNR gets worse as the signal frequency
increases). To achieve good SNR over the complete audio band, the high frequency
components of the audio signal were amplified prior to transmission (this is called
Emphasis).
TFA9879_1
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 8 April 2010
© NXP B.V. 2010. All rights reserved.
11 of 60
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