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PDF HT46R02M Data sheet ( Hoja de datos )

Número de pieza HT46R02M
Descripción (HT4xR0xM) 1.5V Battery 8-Bit OTP MCU
Fabricantes Holtek Semiconductor 
Logotipo Holtek Semiconductor Logotipo



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HT46R01M/HT46R02M
HT48R01M/HT48R02M
1.5V Battery 8-Bit OTP MCU
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
CPU Features
· Operating voltage: 3.0V (Typ.)
· Sleep mode and wake-up functions to reduce
power consumption
· Oscillator types:
External high freuency Crystal -- HXT
External RC -- ERC
Internal RC -- HIRC
External low frequency crystal -- LXT
· Three operational modes: Normal, Slow, Sleep
· Fully integrated internal 4MHz and 8MHz oscillator
requires no external components
· OTP Program Memory: 1K´15 ~ 2K´15
· RAM Data Memory: 96´8
· Watchdog Timer function
· LIRC oscillator function for watchdog timer
· All instructions executed in one or two instruction
cycles
· Table read instructions
· 63 powerful instructions
General Description
The 1.5V Battery MCUs are a series of 8-bit high perfor-
mance, RISC architecture microcontrollers specifically
www.DataSheet4Ud.ecsoigmned for a wide range of applications. The usual
Holtek microcontroller features of a 3V DC/DC con-
verter low power consumption, I/O flexibility, timer func-
tions, oscillator options, power down and wake-up
functions, watchdog timer and low voltage reset, com-
bine to provide devices with a huge range of functional
· 6-level subroutine nesting
· Bit manipulation instruction
· Low voltage reset function
· 16-pin NSOP package
Peripheral Features
· 10 bidirectional I/O lines
· 4 channel 12-bit ADC
· 1 channel 8-bit PWM
· External interrupt input shared with an I/O line
· Two 8-bit programmable Timer/Event
Counter with overflow interrupt and prescaler
· Time-Base function
· Programmable Frequency Divider - PFD
· Embedded 3V DC/DC
options while still maintaining a high level of cost effec-
tiveness. The fully integrated 3V DC/DC converter,
which transforms 1.5V to 3V, provides the MCUs a sta-
ble 3V power supply, opens up a huge range of new
1.5V application possibilities for these devices, some of
which may include, consumer products, household ap-
pliances subsystem controllers, etc.
Rev. 1.00
1 December 18, 2009

1 page




HT46R02M pdf
HT46R01M/HT46R02M/HT48R01M/HT48R02M
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+6.0V
Input Voltage..............................VSS-0.3V to VDD+0.3V
IOL Total ..............................................................100mA
Total Power Dissipation .....................................500mW
Storage Temperature ............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
IOH Total............................................................-100mA
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Ta=25°C
Symbol
Parameter
VDD Operating Voltage
Test Conditions
VDD Conditions
fSYS=4MHz
¾
fSYS=8MHz
Min. Typ. Max. Unit
¾ 3.0 3.3 V
¾ 3.0 3.3 V
IDD1
Operating Current
(HXT, HIRC, ERC)
3V No load, fSYS=4MHz
¾ 0.8 1.2 mA
IDD2
Operating Current
(HXT, HIRC, ERC)
3V No load, fSYS=8MHz
¾ 1.4 2.1 mA
IDD4
Operating Current
(HIRC + LXT, Slow Mode)
3V
No load, fSYS=32768Hz
(LVR disabled, LXTLP=1)
¾
5
10 mA
ISTB1
Standby Current
(LIRC On, LXT Off)
3V No load, system HALT
¾ ¾ 5 mA
ISTB2
Standby Current
(LIRC Off, LXT Off)
3V No load, system HALT
¾ ¾ 1 mA
ISTB3
Standby Current
(LIRC Off, LXT On, LXTLP=1)
3V No load, system HALT
¾ ¾ 5 mA
VIL1
Input Low Voltage for I/O,
TCn and INT
¾
¾
0 ¾ 0.3VDD V
VIH1
Input High Voltage for I/O,
TCn and INT
¾
¾ 0.7VDD ¾ VDD V
VIL2
www.DataSheet4UV.cIHo2m
Input Low Voltage (RES)
Input High Voltage (RES)
¾
¾
¾ 0 ¾ 0.4VDD V
¾ 0.9VDD ¾ VDD V
VLVR
Low Voltage Reset 3
¾ VLVR = 2.1V
1.98 2.1 2.22
V
IOL1 I/O Port Sink Current
3V VOL=0.1VDD
4 8 ¾ mA
IOH I/O Port Source Current
3V VOH=0.9VDD
-2 -4 ¾ mA
IOL2 PA7 Sink Current
3V VOL=0.1VDD
0.8 1.2 ¾ mA
RPH Pull-high Resistance
3V ¾
20 60 100 kW
Note: The standby current (ISTB1~ISTB3) and IDD4 are measured with all I/O pins in input mode and tied to VDD.
Rev. 1.00
5 December 18, 2009

5 Page





HT46R02M arduino
HT46R01M/HT46R02M/HT48R01M/HT48R02M
Program Memory
The Program Memory is the location where the user
code or program is stored. The device is supplied with
One-Time Programmable, OTP, memory where users
can program their application code into the device. By
using the appropriate programming tools, OTP devices
offer users the flexibility to freely develop their applica-
tions which may be useful during debug or for products
requiring frequent upgrades or program changes.
Structure
The Program Memory is addressed by the Program
Counter and also contains data, table information and
interrupt entries. Table data, which can be setup in any
location within the Program Memory, is addressed by
separate table pointer registers.
Special Vectors
Within the Program Memory, certain locations are re-
served for special usage such as reset and interrupts.
· Reset Vector
This vector is reserved for use by the device reset for
program initialisation. After a device reset is initiated, the
program will jump to this location and begin execution.
· External interrupt vector
This vector is used by the external interrupt. If the ex-
ternal interrupt pin on the device receives an edge
transition, the program will jump to this location and
begin execution if the external interrupt is enabled and
the stack is not full. The external interrupt active edge
transition type, whether high to low, low to high or both
is specified in the CTRL1 register.
· Timer/Event 0/1 counter interrupt vector
This internal vector is used by the Timer/Event Coun-
ters. If a Timer/Event Counter overflow occurs, the
program will jump to its respective location and begin
execution if the associated Timer/Event Counter inter-
www.DataSheet4U.cruopmt is enabled and the stack is not full.
· A/D interrupt vector
This internal vector is used by the A/D converter. If
A/D conversion complete , the program will jump to
this location and begin execution if the A/D interrupt is
enabled and the stack is not full.
· Time base interrupt vector
This internal vector is used by the internal Time Base.
If a Time Base overflow occurs, the program will jump
to this location and begin execution if the Time Base
counter interrupt is enabled and the stack is not full.
Look-up Table
Any location within the Program Memory can be defined
as a look-up table where programmers can store fixed
data. To use the look-up table, the table pointer must
first be setup by placing the lower order address of the
look up data to be retrieved in the table pointer register,
TBLP. This register defines the lower 8-bit address of
the look-up table.
After setting up the table pointer, the table data can be
retrieved from the current Program Memory page or last
Program Memory page using the ²TABRDC[m]² or
²TABRDL [m]² instructions, respectively. When these in-
structions are executed, the lower order table byte from
the Program Memory will be transferred to the user de-
fined Data Memory register [m] as specified in the in-
struction. The higher order table data byte from the
Program Memory will be transferred to the TBLH special
register. Any unused bits in this transferred higher order
byte will be read as ²0².
H T46R 01M
00H R eset
04H
E x te rn a l
In te rru p t
08H
T im e r 0
In te rru p t
0C H
T im e r 1
In te rru p t
10H
A /D
In te rru p t
14H
T im e B a s e
In te rru p t
18H
H T46R 02M
R eset
E x te rn a l
In te rru p t
T im e r 0
In te rru p t
T im e r 1
In te rru p t
A /D
In te rru p t
T im e B a s e
In te rru p t
H T48R 01M
00H R eset
04H
E x te rn a l
In te rru p t
08H
T im e r 0
In te rru p t
0C H
T im e r 1
In te rru p t
10H
14H
T im e B a s e
In te rru p t
18H
H T48R 02M
R eset
E x te rn a l
In te rru p t
T im e r 0
In te rru p t
T im e r 1
In te rru p t
T im e B a s e
In te rru p t
3 F F H 1 4 b its
3 F F H 1 4 b its
7 F F H 1 5 b its
7 F F H 1 5 b its
Program Memory Structure
Rev. 1.00
11 December 18, 2009

11 Page







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