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PDF AD10465 Data sheet ( Hoja de datos )
| Número de pieza | AD10465 | |
| Descripción | 65 MSPS A/D Converter | |
| Fabricantes | Analog Devices | |
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Data Sheet
Dual Channel, 14-Bit, 65 MSPS A/D Converter
with Analog Input Signal Conditioning
AD10465
FEATURES
Dual, 65 MSPS minimum sample rate
Channel-to-channel matching, ±0.5% gain error
Channel-to-channel isolation, >90 dB
DC-coupled signal conditioning included
Selectable bipolar input voltage range
(±0.5 V, ±1.0 V, ±2.0 V)
Gain flatness up to 25 MHz: <0.2 dB
80 dB spurious-free dynamic range
Twos complement output format
3.3 V or 5 V CMOS-compatible output levels
1.75 W per channel
Industrial and military grade
The AD10465 uses innovative high density circuit design and laser
trimmed, thin film resistor networks to achieve exceptional
matching and performance, while still maintaining excellent
isolation and providing for significant board area savings.
The AD10465 operates with ±5.0 V supplies for the analog
signal conditioning with a separate 5.0 V supply for the analog-
to-digital conversion and 3.3 V digital supply for the output
stage. Each channel is completely independent, allowing
operation with independent encode and analog inputs. The
AD10465 also offers the user a choice of analog input signal
ranges to further minimize additional external signal
conditioning, while remaining general-purpose.
APPLICATIONS
Phased array receivers
Communications receivers
FLIR processing
Secure communications
GPS antijamming receivers
Multichannel, multimode receivers
GENERAL DESCRIPTION
The AD10465 is packaged in a 68-lead ceramic leaded chip
carrier package, footprint-compatible with the earlier
generation AD10242 (12-bit, 40 MSPS) and AD10265 (12-bit,
65 MSPS). Manufacturing is done on the Analog Devices Mil-
38534 Qualified Manufacturers Line (QML) and components
are available up to Class-H (−40°C to +85°C). The AD6644
internal components are manufactured on Analog Devices’ high
speed complementary bipolar process (XFCB).
The AD10465 is a full channel ADC solution with on-module
PRODUCT HIGHLIGHTS
signal conditioning for improved dynamic performance and
fully matched channel-to-channel performance. The module
includes two wide dynamic range AD6644 ADCs. Each
1. Guaranteed sample rate of 65 MSPS.
2. Input amplitude options, user configurable.
AD6644 has a dc-coupled amplifier front end including an
3. Input signal conditioning included; both channels matched
AD8037 low distortion, high bandwidth amplifier that provides
for gain.
high input impedance and gain and drives the AD8138 single-
to-differential amplifier. The AD6644s have on-chip track-and-
hold circuitry and utilize an innovative multipass architecture
4. Fully tested/characterized performance.
5. Footprint-compatible family; 68-lead CLCC package.
to achieve 14-bit, 65 MSPS performance.
FUNCTIONAL BLOCK DIAGRAM
AINA3 AINA2 AINA1
87
6
REF_A
3
AINB3 AINB2 AINB1
64 63 62
DRAOUT 12
D0A (LSB) 15
D1A 16
56 REF_B
D2A 17
D3A 18
D4A 19
D5A 20
D6A 21
D7A 22
D8A 23
D9A 24
D10A 25
AD10465
TIMING
VREF
DROUT
11
14
OUTPUT BUFFERING
3
28
29 31 32
33
34
55 DRBOUT
TIMING
52 ENCODEB
51 ENCODEB
VREF
DROUT
14
49 D13B (MSBB)
48 D12B
5
47 D11B
OUTPUT BUFFERING
9
46 D10B
45 D9B
35 36 37 38 39 40 41 42
ENCODEA ENCODEA D11 D12A D13A (MSBA) D0B (LSBB) D1B D2B D3B D4B D5B D6B D7B D8B
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2001–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD10465
Parameter
SINAD8
Analog Input @ 4.98 MHz
Analog Input @ 9.9 MHz
Analog Input @ 19.5 MHz
Analog Input @ 32.1 MHz
SPURIOUS-FREE DYNAMIC RANGE9
Analog Input @ 4.98 MHz
Analog Input @ 9.9 MHz
Analog Input @ 19.5 MHz
Analog Input @ 32.1 MHz
TWO-TONE IMD REJECTION10
fIN = 10 MHz and 11 MHz
f1 and f2 are −7 dB
fIN = 31 MHz and 32 MHz
f1 and f2 Are −7 dB
CHANNEL-TO-CHANNEL ISOLATION11
TRANSIENT RESPONSE
OVERVOLTAGE RECOVERY TIME
VIN = 2.0 × fS
VIN = 4.0 × fS
DIGITAL OUTPUTS12
Logic Compatibility
DVCC = 3.3 V
Logic 1 Voltage
Logic 0 Voltage
DVCC = 5 V
Logic 1 Voltage
Logic 0 Voltage
Output Coding
POWER SUPPLY
AVCC Supply Voltage13
I (AVCC) Current
AVEE Supply Voltage13
I (AVEE) Current
DVCC Supply Voltage13
I (DVCC) Current
ICC (Total) Supply Current per Channel
Power Dissipation (Total)
Power Supply Rejection Ratio (PSRR)
Passband Ripple to 10 MHz
Passband Ripple to 25 MHz
Data Sheet
Test1 Mil
Temp Level Subgroup
AD10465BZ/QML-H
Min Typ
Max
Unit
25°C V
25°C I
Full II
25°C I
Full II
25°C I
Full II
4
5, 6
4
5, 6
4
5, 6
70
67.5 69
67.5 69
65 68
65 68
60 63
58 61
dB
dB
dB
dB
dB
dB
dB
25°C V
25°C I
Full II
25°C I
Full II
25°C I
Full II
4
5, 6
4
5, 6
4
5, 6
85
73 82
70 82
72 78
70 78
62 68
60 66
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
25°C I
II
25°C I
Full II
25°C IV
25°C V
4
5, 6
4
5, 6
12
78 87
78
68 70
60
90
15.3
dBFS
dBFS
dBFS
dBFS
dB
ns
Full IV
Full IV
12
12
40 100 ns
150 200 ns
CMOS
Full I
Full I
1, 2, 3
1, 2, 3
2.5 DVCC − 0.2
V
0.2 0.5 V
Full V
Full V
DVCC − 0.3
0.35
Twos complement
V
V
Full VI
Full I
Full VI
Full V
Full VI
Full V
Full I
Full I
Full V
V
V
1, 2, 3
1, 2, 3
4.85
−5.25
3.135
5.0
270
−5.0
38
3.3
30
338
3.5
0.02
0.1
0.2
5.25
308
−4.75
49
3.465
46
403
3.9
V
mA
V
mA
V
mA
mA
W
% FSR/% VS
dB
dB
Rev. B | Page 4 of 24
5 Page 
AD10465
0
ENCODE = 65MSPS
–10 AIN = 9MHz AND
–20 10MHz (–7dBFS)
SFDR = 82.83dBc
–30
–40
–50
–60
–70
–80 F2–
–90 F1
2F1–
F2
2F2–
F1
F1+
F2
2F1+
F2
2F2+
F1
–100
–110
–120
–130
0
2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 27.5 30.0 32.5
FREQUENCY (MHz)
Figure 14. Two Tone @ 9 MHz and 10 MHz
3.0
ENCODE = 65MSPS
DNL MAX = +0.549 LSB
2.5 DNL MIN = –0.549 LSB
2.0
1.5
1.0
0.5
0
–0.5
–1.0
0
2048 4096 6144 8192 10240 12288 14336 16384
CODES
Figure 15. Differential Nonlinearity
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
1.0 4.2 7.4 10.6 13.8 17.0 20.2 23.4 26.6 29.8 33.0
FREQUENCY (MHz)
Figure 16. Gain Flatness
Data Sheet
0
ENCODE = 65MSPS
–10 AIN = 17MHz AND
–20 18MHz (–7dBFS)
SFDR = 77.68dBc
–30
–40
–50
–60
–70
–80 F2–
F1
–90
2F2+ 2F1+
F1 F2
2F1–
F2
2F2–
F1
F1+
F2
–100
–110
–120
–130
0
2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 27.5 30.0 32.5
FREQUENCY (MHz)
Figure 17. Two Tone @ 17 MHz and 18 MHz
3
ENCODE = 65MSPS
INL MAX = +1.173 LSB
2 INL MIN = –1.332 LSB
1
0
–1
–2
–3
0
72.0
71.5
71.0
70.5
70.0
69.5
69.0
68.5
68.0
67.5
2048 4096 6144 8192 10240 12288 14336 16384
CODES
Figure 18. Integral Nonlinearity
+85°C
–40°C
+25°C
5 10 19
AIN (MHz)
Figure 19. SNR vs. AIN Frequency
32
Rev. B | Page 10 of 24
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet AD10465.PDF ] | |
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