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PDF HT48R065V Data sheet ( Hoja de datos )
| Número de pieza | HT48R065V | |
| Descripción | 24V VFD Type 8-Bit OTP MCU | |
| Fabricantes | Holtek Semiconductor | |
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HT48R065V
24V VFD Type 8-Bit OTP MCU
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
CPU Features
· Operating voltage:
fSYS= 4MHz: 2.2V~5.5V
fSYS= 8MHz: 3.0V~5.5V
fSYS= 12MHz: 4.5V~5.5V
· Up to 0.33ms instruction cycle with 12MHz system
clock at VDD= 5V
· Sleep mode and wake-up functions to reduce
power consumption
· Oscillator types:
External high freuency Crystal -- HXT
External RC -- ERC
Internal high frequency RC -- HIRC
External low frequency crystal -- LXT
· Four operational modes: Normal, Slow, Sleep
· Fully integrated internal 4MHz, 8MHz and 12MHz
oscillator requires no external components
· 2048´15 program memory
· 96´8 data memory RAM
· Watchdog Timer function
· LIRC oscillator function for watchdog timer
· All instructions executed in one or two instruction
cycles
· Table read instructions
· 63 powerful instructions
· 4-level subroutine nesting
· Bit manipulation instruction
· Low voltage reset function
· Wide range of available package types
Peripheral Features
· 21 bidirectional I/O lines
· Software controlled 4-SCOM lines LCD COM driver
with 1/2 bias
· External interrupt input shared with an I/O line
· Single 8-bit programmable Timer/Event
Counter with overflow interrupt and prescaler
· Time-Base function
· Programmable Frequency Divider - PFD
· Integrated DC 24V to 5V LDO regulator
· Buzzer and filament 5V to 24V output level shifter
· 24-bit shift register/latch for VFD panel driving 24
grid/segment outputs
· Integrated 3-line serial VFD interface for grid/seg-
ment display control
· 52-pin QFP package
General Description
www.DataSheet4UT.hceom48R065V is a 24V VFD Type 8-bit high perfor-
mance, RISC architecture microcontrollers specifically
designed for a wide range of applications. The usual
Holtek microcontroller features of low power consump-
tion, I/O flexibility, timer functions, oscillator options,
power down and wake-up functions, watchdog timer
and low voltage reset, combine to provide devices with
a huge range of functional options while still maintaining
a high level of cost effectiveness. The fully integrated
system oscillator HIRC, which requires no external
components and which has three frequency selections,
opens up a huge range of new application possibilities
for these devices, some of which may include industrial
control, consumer products, household appliances sub-
system controllers, etc.
Rev. 1.00
1 October 20, 2009
1 page  
HT48R065V
D.C. Characteristics
Ta=25°C
Symbol
Parameter
VDD Operating Voltage
Test Conditions
VDD VCC
Conditions
fSYS=4MHz
¾ ¾ fSYS=8MHz
Min. Typ. Max. Unit
2.2 ¾ 5.5 V
3.0 ¾ 5.5 V
fSYS=12MHz
4.5 ¾ 5.5 V
IDD1
Operating Current
(HXT, HIRC, ERC)
3V ¾
No load, fSYS=4MHz
5V ¾
¾ 0.8 1.2 mA
¾ 1.5 2.25 mA
IDD2
Operating Current
(HXT, HIRC, ERC)
3V ¾
No load, fSYS=8MHz
5V ¾
¾ 1.4 2.1 mA
¾ 2.8 4.2 mA
IDD3
Operating Current
(HXT, HIRC, ERC)
5V ¾ No load, fSYS=12MHz
¾4
6 mA
Operating Current
IDD4 (HIRC + LXT, Slow Mode,
LXTLP=1)
3V ¾ No load, fSYS=32768Hz ¾ 5 10 mA
(LXT on OSC1/OSC2,
5V ¾ LVR disabled, LXTLP=1) ¾ 12 24 mA
ISTB1
Standby Current
(LIRC On, LXT Off)
3V ¾
No load, system HALT
5V ¾
¾ ¾ 5 mA
¾ ¾ 10 mA
ISTB2
Standby Current
(LIRC Off, LXT Off)
3V ¾
No load, system HALT
5V ¾
¾ ¾ 1 mA
¾ ¾ 2 mA
ISTB3
Standby Current
3V
(LIRC Off, LXT On, LXTLP=1) 5V
¾ No load, system HALT
¾ (LXT on OSC1/OSC2)
¾ ¾ 5 mA
¾ ¾ 10 mA
VIL1
Input Low Voltage for I/O,
TCn and INT
¾¾
¾
0 ¾ 0.3VDD V
VIH1
Input High Voltage for I/O,
TCn and INT
¾¾
¾
0.7VDD ¾
VDD
V
VIL2 Input Low Voltage (RES)
¾¾
¾
0 ¾ 0.4VDD V
VIH2 Input High Voltage (RES)
¾¾
¾
0.9VDD ¾
VDD
V
VLVR1
www.DataSheet4UV.cLoVmR2
Low Voltage Reset 1
Low Voltage Reset 2
¾ ¾ VLVR=4.2V
¾ ¾ VLVR=3.15V
3.98
2.98
4.2
3.15
4.42
3.32
V
V
VLVR3 Low Voltage Reset 3
¾ ¾ VLVR=2.1V
1.98 2.1 2.22 V
IOL1 I/O Port Sink Current
3V ¾
VOL=0.1VDD
5V ¾
4 8 ¾ mA
10 20 ¾ mA
IOH1 I/O Port Source Current
3V ¾
VOH=0.9VDD
5V ¾
-2 -4 ¾ mA
-5 -10 ¾ mA
IOL PA7 Sink Current
5V ¾ VOL=0.1VDD
2 3 ¾ mA
RPH Pull-high Resistance
3V ¾
5V ¾
¾
¾
20 60 100 kW
10 30 50 kW
SCOMC, ISEL[1:0]=00
17.5 25.0 32.5 mA
ISCOM SCOM Operating Current
SCOMC, ISEL[1:0]=01
5V ¾
SCOMC, ISEL[1:0]=10
35 50 65 mA
70 100 130 mA
SCOMC, ISEL[1:0]=11
140 200 260 mA
Rev. 1.00
5 October 20, 2009
5 Page 
HT48R065V
System Architecture
A key factor in the high-performance features of the
Holtek range of microcontrollers is attributed to the inter-
nal system architecture. The range of devices take ad-
vantage of the usual features found within RISC
microcontrollers providing increased speed of operation
and enhanced performance. The pipelining scheme is
implemented in such a way that instruction fetching and
instruction execution are overlapped, hence instructions
are effectively executed in one cycle, with the exception
of branch or call instructions. An 8-bit wide ALU is used
in practically all operations of the instruction set. It car-
ries out arithmetic operations, logic operations, rotation,
increment, decrement, branch decisions, etc. The inter-
nal data path is simplified by moving data through the
Accumulator and the ALU. Certain internal registers are
implemented in the Data Memory and can be directly or
indirectly addressed. The simple addressing methods of
these registers along with additional architectural fea-
tures ensure that a minimum of external components is
required to provide a functional control system with
maximum reliability and flexibility.
Clocking and Pipelining
The main system clock, derived from either a Crys-
tal/Resonator or RC oscillator is subdivided into four in-
ternally generated non-overlapping clocks, T1~T4. The
Program Counter is incremented at the beginning of the
T1 clock during which time a new instruction is fetched.
The remaining T2~T4 clocks carry out the decoding and
execution functions. In this way, one T1~T4 clock cycle
forms one instruction cycle. Although the fetching and
execution of instructions takes place in consecutive in-
struction cycles, the pipelining structure of the
microcontroller ensures that instructions are effectively
executed in one instruction cycle. The exception to this
are instructions where the contents of the Program
Counter are changed, such as subroutine calls or
jumps, in which case the instruction will take one more
instruction cycle to execute.
For instructions involving branches, such as jump or call
instructions, two instruction cycles are required to com-
plete instruction execution. An extra cycle is required as
the program takes one cycle to first obtain the actual
jump or call address and then another cycle to actually
execute the branch. The requirement for this extra cycle
should be taken into account by programmers in timing
sensitive applications
www.DataSheet4U.com
O s c illa to r C lo c k
( S y s te m C lo c k )
P h a s e C lo c k T 1
P h a s e C lo c k T 2
P h a s e C lo c k T 3
P h a s e C lo c k T 4
P ro g ra m C o u n te r
PC
PC +1
PC +2
P ip e lin in g
F e tc h In s t. (P C )
E x e c u te In s t. (P C -1 )
F e tc h In s t. (P C + 1 )
E x e c u te In s t. (P C )
F e tc h In s t. (P C + 2 )
E x e c u te In s t. (P C + 1 )
System Clocking and Pipelining
1 M O V A ,[1 2 H ]
2 C A LL D E LA Y
3 C P L [1 2 H ]
4:
5:
6 D E LA Y : N O P
F e tc h In s t. 1
E x e c u te In s t. 1
F e tc h In s t. 2
E x e c u te In s t. 2
F e tc h In s t. 3
F lu s h P ip e lin e
F e tc h In s t. 6
E x e c u te In s t. 6
F e tc h In s t. 7
Instruction Fetching
Rev. 1.00
11 October 20, 2009
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT48R065V.PDF ] | |
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