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QS532806A PDF даташит
Спецификация QS532806A изготовлена «Integrated Device Technology» и имеет функцию, называемую «Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer». |
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Детали детали
Номер произв | QS532806A |
Описание | Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer |
Производители | Integrated Device Technology |
логотип | ![]() |
6 Pages

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QS532806/A
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
GUARANTEED LOW SKEW
3.3V CMOS CLOCK
DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
QS532806/A
FEATURES:
− JEDEC compatible LVTTL level
− 10 low skew clock outputs
− Monitor output
− Clock inputs are 5V tolerant
− Pinout and function compatible with QS5806
− 25Ω on-chip resistors for low noise
− Input hysteresis for better noise margin
− Guaranteed low skew:
• 0.7ns output skew (same bank)
• 0.9ns output skew (different bank)
• 1ns part-to-part skew
− Std. and A speed grades
− Available in QSOP and SOIC packages
DESCRIPTION
The QS532806 clock driver/buffer circuit can be used for clock buffering
schemes where low skew is a key parameter. The QS532806 offers two
banks of five inverting outputs. Designed in IDT's proprietary CMOS
process, these devices provide low propagation delay buffering with on-
chip skew of 0.7ns for same-transition, same-bank signals.
The QS532806 has on-chip series termination resistors for lower noise
clock signals. The series resistor versions are recommended for driving
unterminated lines with capacitive loading and other noise sensitive clock
distribution circuits. These clock buffer products are designed for use in
high-performance workstations, embedded and personal computing sys-
tems. Several devices can be used in parallel or scattered throughout a
system for guaranteed low skew, system-wide clock distribution networks.
FUNCTIONAL BLOCK DIAGRAM
www.DataSheet4U.com
OEA
IN A
IN B
OEB
5
OA5 - OA1
MON
5
OB5 - OB1
INDUSTRIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
SEPTEMBER 2000
DSC-5783/-

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QS532806/A
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
PIN CONFIGURATION
VCCA
OA1
OA2
OA3
GNDA
OA4
OA5
GNDQ
OEA
IN A
1 20
2 19
3 18
4 17
5 SO 20-2 16
6 SO 20-8 15
7 14
8 13
9 12
10 11
VCCB
OB1
OB2
OB3
GNDB
OB4
OB5
MON
OEB
IN B
QSOP/ SOIC
TOP VIEW
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
VTERM(2)
VTERM(3)
VAC
IOUT
Description
Max. Unit
Supply Voltage to Ground
– 0.5 to +7 V
DC Output Voltage VOUT
– 0.5 to Vcc+0.5 V
DC Input Voltage VIN
– 0.5 to +7 V
AC Input Voltage (pulse width ≤20ns)
-3 V
DC Output Current VIN < 0
-20 mA
DC Output Current Max. Sink Current/Pin
120
mA
TSTG Storage Temperature
TJ Junction Temperature
– 65 to +150 °C
150 °C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc Terminals.
3. All terminals except Vcc.
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CAPACITANCE
(TA = +25OC, f = 1.0MHz, VIN = 0V, VOUT = 0V)
QSOP
SOIC
Pins
All Pins
Typ. Max. (1) Typ. Max. (1)
4 6 57
NOTE:
1. This parameter is guaranteed but not production tested.
Unit
pF
PIN DESCRIPTION
Pin Names
OEA, OEB
INA, INB
OAn, OBn
MON
I/O Description
I Output Enable Inputs
I Clock Inputs
O Clock Outputs
O Monitor Outputs (non-disable)
2

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QS532806/A
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol
VIH
VIL
VIC
VOH
Parameter
Input HIGH Voltage
Input LOW Voltage
Clamp Diode Voltage (3)
Output HIGH Voltage
VOL Output LOW Voltage
IIN
IOZ
IOFF
IODH
IODL
IOS
ROUT
Input Leakage Current
Output Leakage Current
Input Power Off Leakage
Output HIGH Current (2)
Output LOW Current (2)
Short Circuit Current (2,3)
Output Resistance (4)
Test Conditions
Guaranteed Logic HIGH for Inputs
Guaranteed Logic LOW for Inputs
Vcc = Min., IIN = -18mA
Vcc = Min., IOH = -100µA
Vcc = Min., IOH = -8mA
Vcc = Min., IOL = 100µA
Vcc = Min., IOL = 6mA
Vcc = Min., IOL = 8mA
Vcc = Max., VIN = Vcc or GND
Vcc = Max., VOUT = Vcc or GND
Vcc = 0V, VIN = Vcc or GND
Vcc = 3.3V, VIN = VIH or VIL, VO = 1.5V
Vcc = 3.3V, VIN = VIH or VIL, VO = 1.5V
Vcc = Max., VOUT = GND
Vcc = Min
Min. Typ.(1) Max. Unit
2 — 5.5 V
–0.5 — 0.8 V
— –0.7 –1.2 V
Vcc – 0.2 —
—V
2.4 — — V
— — 0.2 V
— — 0.4 V
— — 0.5 V
— — ±1 µA
— — ±1 µA
— — ±1 µA
–30 –100 –200 mA
30 100 200 mA
– 60 —
— mA
— 28 — Ω
NOTES:
1. Typical values are at VCC = 3.3V, TA = 25°C.
2. Not more than one output should be used to test this high power condition. Duration is less than one second.
3. Guaranteed by design but not tested.
4. Output resistance represents the total output impedence of the logic device and includes added series termination resistance.
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
www.DaICtCaSheet4QUui.ecsocment Power Supply Current
∆ICC Supply Current per Input HIGH
ICCD Dynamic Power Supply Current per Output (2)
IC Total Power Supply Current Examples (2,4)
Test Conditions (1)
VCC = Max., VIN = GND or Vcc
VCC = Max., VIN = 3V
VCC = Max., OEA = OEB = GND
Outputs Toggling at 50% duty cycle
VCC = Max.,
OEA = OEB = GND
VIN = GND or Vcc
50% duty cycle, fI = 10MHz
five outputs
VIN = GND or 3V
VCC = Max.,
OEA = OEB = GND
VIN = GND or Vcc
50% duty cycle, fI = 2.5MHz
All outputs toggling
VIN = GND or 3V
Typ. (3)
0.01
0.1
65
3.5
3.5
1.8
1.8
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Guaranteed by design but not tested. CL = 0pF.
3. Typical values are for reference only. Conditions are VCC = 3.3V, TA = 25°C.
4. IC = ICC + (∆ICC)(DH)(NT) + ICCD (fO)(NO)
where:
DH = Input Duty Cycle
NT = Number of TTL HIGH inputs at DH (one or two)
fO = Output Frequency
NO = Number of outputs at fO (five or ten)
3
Max. Unit
100 µA
30 µA
100 µA/MHz
5.2 mA
5.2 mA
2.9 mA
2.9 mA

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QS532806 | Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer | ![]() Integrated Device Technology |
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