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SPP42N03S2L-13 PDF даташит
Спецификация SPP42N03S2L-13 изготовлена «Infineon Technologies AG» и имеет функцию, называемую «OptiMOS Power-Transistor». |
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Детали детали
Номер произв | SPP42N03S2L-13 |
Описание | OptiMOS Power-Transistor |
Производители | Infineon Technologies AG |
логотип | ![]() |
10 Pages

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OptiMOS® Power-Transistor
Features
• N-channel
• Enhancement mode
• Logic level
• Excellent gate charge x R DS(on) product (FOM)
• Superior thermal resistance
• 175 °C operating temperature
P-TO262-3-1
• Avalanche rated
• dv /dt rated
SPI42N03S2L-13
SPP42N03S2L-13 SPB42N03S2L-13
Product Summary
V DS
R DS(on),max
ID
30 V
12.9 mΩ
42 A
P-TO263-3-2
P-TO220-3-1
Type
SPP42N03S2L-13
SPB42N03S2L-13
SPI42N03S2L-13
Package
P-TO220-3-1
P-TO263-3-2
P-TO262-3-1
Ordering Code
Q67042-S4034
Q67042-S4035
Q67042-S4104
Marking
2N03L13
2N03L13
2N03L13
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
www.DataSheet4U.com
Continuous drain current1)
I D T C=25 °C
T C=100 °C
Pulsed drain current
I D,pulse T C=25 °C
Avalanche energy, single pulse
Repetitive avalanche energy
E AS
E AR
I D=42 A, R GS=25 Ω
limited by T jmax 2)
Reverse diode dv /dt
dv /dt
I D=42 A, V DS=24 V,
di /dt =200 A/µs,
T j,max=175 °C
Gate source voltage
V GS
Power dissipation
P tot T C=25 °C
Operating and storage temperature T j, T stg
IEC climatic category; DIN IEC 68-1
Value
42
42
248
110
8
6
±20
83
-55 ... 175
55/175/56
Unit
A
mJ
mJ
kV/µs
V
W
°C
Rev. 2.0
page 1
2004-06-04

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SPI42N03S2L-13
SPP42N03S2L-13 SPB42N03S2L-13
Parameter
Symbol Conditions
min.
Values
typ.
Unit
max.
Thermal characteristics
Thermal resistance, junction - case R thJC
- 1.2 1.8 K/W
SMD version, device on PCB
R thJA minimal footprint
- - 62
6 cm2 cooling area3)
-
- 40
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance4)
www.DataSheet4U.com
Gate resistance
Transconductance
V (BR)DSS V GS=0 V, I D=1 mA
V GS(th) V DS=V GS, I D=37 µA
I DSS
V DS=30 V, V GS=0 V,
T j=25 °C
V DS=30 V, V GS=0 V,
T j=125 °C
I GSS
R DS(on)
V GS=20 V, V DS=0 V
V GS=4.5 V, I D=21 A
V GS=4.5 V, I D=21 A,
SMD version
V GS=10 V, I D=21 A
V GS=10 V, I D=21 A,
SMD version
RG
g fs
|V DS|>2|I D|R DS(on)max,
I D=42 A
30
1.2
-
-
-
-
-
-
-
-
21
- -V
1.6 2
0.01 1 µA
10 100
1 100 nA
14.9 19.9 mΩ
14.5 19.6
10.3 12.9
9.9 12.6
1 -Ω
42 - S
1) Current is limited by bondwire; with an R thJC=1.8 K/W the chip is able to carry 64 A at 25°C, for detailed information
see app.-note ANPS071E at www.infineon.com/optimos.
2) Defined by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
4) Diagrams are related to straight lead versions.
Rev. 2.0
page 2
2004-06-04

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Parameter
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Reverse Diode
Diode continous forward current
www.DatDaSiohdeeet4pUu.clsoemcurrent
Diode forward voltage
Reverse recovery time
Reverse recovery charge
SPI42N03S2L-13
SPP42N03S2L-13 SPB42N03S2L-13
Symbol Conditions
min.
Values
typ.
Unit
max.
C iss
C oss
Crss
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=15 V, V GS=10 V,
I D=21 A, R G=7.8 Ω
-
-
-
-
-
-
-
850 1130 pF
330 440
90 130
6.5 9.8 ns
12 18
24 36
14.5 21.8
Q gs
Q gd
Qg
V plateau
V DD=24 V, I D=21 A,
V GS=0 to 10 V
- 2.7 3.6 nC
- 7.9 11.9
- 22.9 30.5
- 3.5 - V
IS
I S,pulse
V SD
T C=25 °C
V GS=0 V, I F=42 A,
T j=25 °C
t rr
V R=15 V, I F=I S,
di F/dt =100 A/µs
Q rr
- - 42 A
- - 248
- 0.95 1.25 V
- 24 31 ns
- 18 23 nC
Rev. 2.0
page 3
2004-06-04

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