WV3EG232M64STSU-D4 PDF даташит

Спецификация WV3EG232M64STSU-D4 изготовлена «White Electronic Designs» и имеет функцию, называемую «512MB - 2x32Mx64 DDR SDRAM UNBUFFERED».

Детали детали

Номер произв	WV3EG232M64STSU-D4
Описание	512MB - 2x32Mx64 DDR SDRAM UNBUFFERED
Производители	White Electronic Designs
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WV3EG232M64STSU-D4 Даташит, Описание, Даташиты

White Electronic Designs WV3EG232M64STSU-D4

PRELIMINARY*

512MB – 2x32Mx64 DDR SDRAM UNBUFFERED

FEATURES

PC2700 @ CL2.5

Double-data-rate architecture

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2,2.5 (clock)

Programmable Burst Length (2,4,8)

Programmable Burst type (sequential & interleave)

Auto and self refresh, (8K/64ms refresh)

Serial presence detect with EEPROM

Power supply: VCC/VCCQ: 2.5V ± 0.20V

Dual Rank

Standard 200 pin SO-DIMM package

• Package height options

D4: 31.75mm (1.25")

NOTE: Consult factory for availability of:

• RoHS compliant products

• Vendor source control options

• Industrial Temperature option

DESCRIPTION

The WV3EG232M64STSU is a 2x32Mx64 Double Data

Rate SDRAM memory module based on 512Mb DDR

SDRAM component. The module consists of eight 32Mx16

DDR SDRAMs in 66 pin TSOP packages mounted on a

200 pin FR4 substrate.

Synchronous design allows precise cycle control with the

use of system clock. Data 1/0 transactions are possible on

both edges and Burst Lengths allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

* This product is under development, is not qualiﬁed or characterized and is subject to

change without notice.

www.DataSheet4U.com

OPERATING FREQUENCIES

Clock Speed

CL-tRCD-tRP

DDR333@CL=2.5

166MHz

2.5-3-3

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

September 2005

Rev. 1

1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

No Preview Available !

White Electronic Designs WV3EG232M64STSU-D4

PRELIMINARY

PIN CONFIGURATION

PIN NAMES

PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL

VREF

VSS 101

151 DQ42

VREF

VSS 102

152 DQ46

3 VSS 53 DQ19 103 VSS 153 DQ43

4 VSS 54 DQ23 104 VSS 154 DQ47

5 DQ0 55 DQ24 105 A7 155 VCC

6 DQ4 56 DQ28 106 A6 156 VCC

7 DQ1 57 VCC 107 A5 157 VCC

8 DQ5 58 VCC 108 A4 158 CK1#

9 VCC 59 DQ25 109 A3 159 VSS

10 VCC 60 DQ29 110 A2 160 CK1

11 DQS0 61 DQS3 111 A1 161 VSS

12 DM0 62 DM3 112 A0 162 VSS

13 DQ2 63 VSS 113 VCC 163 DQ48

14 DQ6 64 VSS 114 VCC 164 DQ52

15 VSS 65 DQ26 115 A10/AP 165 DQ49

16 VSS 66 DQ30 116 BA1 166 DQ53

17 DQ3 67 DQ27 117 BA0 167 VCC

18 DQ7 68 DQ31 118 RAS# 168 VCC

19 DQ8 69 VCC 119 WE# 169 DQS6

20 DQ12 70

VCC 120 CAS# 170 DM6

21 VCC 71 NC 121 CS0# 171 DQ50

22 VCC 72 NC 122 CS1# 172 DQ54

23 DQ9 73

NC 123 NC 173 VSS

24 DQ13 74

NC 124 NC 174 VSS

25 DQS1 75

VSS 125 VSS 175 DQ51

26 DM1 76

VSS 126 VSS 176 DQ55

27 VSS 77 NC 127 DQ32 177 DQ56

28 VSS 78 NC 128 DQ36 178 DQ60

29 DQ10 79

ww3w0.DataSDhQe14et4U.c8o0m

129 DQ33 179

130 DQ37 180

VCC

31 DQ11 81

VCC 131 VCC 181 DQ57

32 DQ15 82

VCC 132 VCC 182 DQ61

33 VCC 83 NC 133 DQS4 183 DQS7

34 VCC 84 NC 134 DM4 184 DM7

35 CK0 85

NC 135 DQ34 185 VSS

36 VCC 86 NC 136 DQ38 186 VSS

37 CK0# 87

VSS 137 VSS 187 DQ58

38 VSS 88 VSS 138 VSS 188 DQ62

39 VSS 89 NC 139 DQ35 189 DQ59

40 VSS 90 VSS 140 DQ39 190 DQ63

41 DQ16 91

NC 141 DQ40 191 VCC

42 DQ20 92

VCC 142 DQ44 192 VCC

43 DQ17 93

VCC 143 VCC 193 SDA

44 DQ21 94

VCC 144 VCC 194 SA0

45 VCC 95 CKE1 145 DQ41 195 SCL

46 VCC 96 CKE0 146 DQ45 196 SA1

47 DQS2 97

NC 147 DQS5 197 VCCSPD

48 DM2 98

NC 148 DM5 198 SA2

49 DQ18 99 A12 149 VSS 199 NC

50 DQ22 100 A11 150 VSS 200 NC

AO -A12

BA0-BA1

DQO-DQ63

DQSO-DQS7

CK0, CK1

CK0#, CK1#

CKE0, CKE1

CS0#, CS1#

RAS#

CAS#

WE#

DM0-DM7

VCC

VCCQ

VSS

VREF

VCCSPD

SDA

SCL

SA0-SA2

Address input (Multiplexed)

Bank SelectAddress

Data I nput/Output

Data Strobe Input/Output

Clock Input

Clock input

Clock Enable input

Chip select Input

Row Address Strobe

Column Address Strobe

Write Enable

Data-In Mask

Power Supply

Power Supply for DQS

Ground

Power Supply for Reference

Serial EEPROM Power Supply

Serial data I/O

Serial clock

Address in EEPROM

No Connect

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

September 2005

Rev. 1

2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

No Preview Available !

White Electronic Designs WV3EG232M64STSU-D4

PRELIMINARY

FUNCTIONAL BLOCK DIAGRAM

CS1#

CS0#

DQS0

DM0

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQS1

DM1

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

DQS4

DM4

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQS5

DM5

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

DQS2

DM2

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

DQS3

DM3

UDQS

UDM

DQ8

I/O 8

DQ9

I/O 9

DQ10

I/O 10

DQ11

I/O 11

DQ12

I/O 12

www.DataSDhQ1e3et4U.comI/O 13

DQ14

I/O 14

CS#

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

BA0, BA1

A0-A12

RAS#

CAS#

CKE0

CKE1

WE#

VCCSPD

VCC/VCCQ

VREF

VSS

BA0, BA1: DDR SDRAMs

A0-A12: DDR SDRAMs

RAS#: DDR SDRAMs

CAS#: DDR SDRAMs

CKE0: DDR SDRAMs

CKE1: DDR SDRAMs

WE#: DDR SDRAMs

SPD

DDR SDRAM

DQS6

DM6

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQS7

DM7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

LDQS

LDM

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

CS#

UDQS

UDM

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

Clock Wiring

Clock

Input

SDRAMs

CK0/CK0#

CK1/CK1#

CK2/CK2#

4 SDRAMs

*Clock Net Wiring

SCL

SERIAL PD

A0 A1 A2

SA0 SA1 SA2

R = 120 Ohm

CK0/1/2

CK0/1/2# Card

Edge

SDA

DDR SDRAMs

NOTE: All resistor values are 22 ohmes unless otherwise speciﬁed.

Notes:

1. DQ-to-I/O wiring is shown as recommended but may be changed.

2. DQ/DQS/DM/CKE/CS relationships must be maintained as shown.

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

September 2005

Rev. 1

3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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Номер в каталоге	Описание	Производители
WV3EG232M64STSU-D4	512MB - 2x32Mx64 DDR SDRAM UNBUFFERED	White Electronic Designs

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