WV3EG128M72EFSR-D3 PDF даташит

Спецификация WV3EG128M72EFSR-D3 изготовлена «White Electronic Designs» и имеет функцию, называемую «1GB - 128Mx72 DDR SDRAM REGISTERED w/PLL».

Детали детали

Номер произв	WV3EG128M72EFSR-D3
Описание	1GB - 128Mx72 DDR SDRAM REGISTERED w/PLL
Производители	White Electronic Designs
логотип

13 Pages

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WV3EG128M72EFSR-D3 Даташит, Описание, Даташиты

White Electronic Designs WV3EG128M72EFSR-D3

ADVANCED*

1GB – 128Mx72 DDR SDRAM REGISTERED w/PLL, FBGA

FEATURES

Double-data-rate architecture

DDR266 and DDR333

• JEDEC design speciﬁcations

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2,2,5 (clock)

Programmable Burst Length (2,4,8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input

Auto and self refresh

Serial presence detect

Power Supply:

• VCC = VCCQ = +2.5V ±0.2V (100, 133 and

166MHz)

184 pin DIMM package

PCB height:

• D3: 29.97mm (1.18")

NOTE: Consult factory for availability of:

• Lead-Free Products

• Vendor source control options

www.Da• tIandSuhsteriaeltt4emUp.ecroatmure options

DESCRIPTION

The WV3EG128M72EFSR is a 128Mx72 Double Data

Rate SDRAM memory module based on 512Mb DDR

SDRAM component. The module consists of eighteen

64Mx8 DDR components in FBGA packages mounted on

a 184 Pin FR4 substrate.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible on

both edges and Burst Lenths allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

* This product is under development, is not qualiﬁed or characterized and is subject to

change or cancellation without notice.

Clock Speed

CL-tRCD-tRP

OPERATING FREQUENCIES

DDR333 @CL=2.5

166MHz

2.5-3-3

DDR266 @CL=2

133MHz

2-2-2

DDR266 @CL=2.5

133MHz

2.5-3-3

March 2005

Rev. 0

1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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White Electronic Designs WV3EG128M72EFSR-D3

ADVANCED

PIN CONFIGURATION

PIN SYMBOL PIN SYMBOL

1 VREF 47 DQS8

2 DQ0 48 A0

3 VSS 49 CB2

4 DQ1 50 VSS

DQS0

CB3

6 DQ2 52 BA1

7 VCC 53 DQ32

8 DQ3 54 VCCQ

9 NC 55 DQ33

10 RESET# 56

DQS4

11 VSS 57 DQ34

12 DQ8 56

VSS

13 DQ9 59 BA0

14 DQS1 60 DQ35

15 VCCQ 61 DQ40

16 NC 62 VCCQ

17 NC 63 WE#

18 VSS 64 DQ41

19 DQ10 65 CAS#

20 DQ11 66

VSS

21 CKE0 67 DQS5

22 VCCQ 68 DQ42

23 DQ16 69 DQ43

24 DQ17 70

VCC

25 DQS2 71

26 VSS 72 DQ48

27 A9 73 DQ49

28 DQ18 74

VSS

29 A7 75 NC

ww30w.DataVSCChQ eet4U7.6com NC

31 DQ19 77

VCCQ

32 A5 78 DQS6

33 DQ24 79 DQ50

34 VSS 80 DQ51

35 DQ25 81

VSS

36 DQS3 82 VCCID

37 A4 83 DQ56

38 VCC 84 DQ57

39 DQ26 85

VCC

40 DQ27 86 DQS7

41 A2 87 DQ58

42 VSS 88 DQ59

43 A1 89 VSS

44 CB0 90 NC

45 CB1 91 SDA

46 VCC 92 SCL

PIN SYMBOL PIN SYMBOL

93 VSS 139 VSS

94 DQ4 140 DM8/DQS17

95 DQ5 141 A10

VCCQ

142

CB6

97 DM0/DQS9 143

VCCQ

98 DQ6 144 CB7

99 DQ7 145 VSS

100 VSS 146 DQ36

101 NC 147 DQ37

102 NC 148 VCC

103 NC 149 DM4/DQS13

104 VCCQ 150 DQ38

105 DQ12 151 DQ39

106 DQ13 152

VSS

107 DM1/DQS10 153 DQ44

108 VCC 154 RAS#

109 DQ14 155 DQ45

110 DQ15 156 VCCQ

111 CKE1 157 CS0#

112 VCCQ 158 CS1#

113 NC 159 DM5/DQS14

114 DQ20 160

VSS

115 A12 161 DQ46

116 VSS 162 DQ47

117 DQ21 163

118 A11 164 VCCQ

119 DM2/DQS11 165 DQ52

120 VCC 166 DQ53

121 DQ22 167

122 A8 168 VCC

123 DQ23 169 DM6/DQS15

124 VSS 170 DQ54

125 A6 171 DQ55

126 DQ28 172 VCCQ

127 DQ29 173

128 VCCQ 174 DQ60

129 DM3/DQS12 175 DQ61

130 A3 176 VSS

131 DQ30 177 DM7/DQS16

132 VSS 178 DQ62

133 DQ31 179 DQ63

134 CB4 180 VCCQ

135 CB5 181 SA0

136 VCCQ 182 SA1

137 CK0 183 SA2

138 CK0# 184 VCCSPD

A0-A12

BA0-BA1

DQ0-DQ63

CB0-CB7

DQS0-DQS8

CK0

CK0#

CKE0, CKE1

CS0#, CS1#

RAS#

CAS#

DM0-DM8

WE#

VCC

VCCQ

VSS

VREF

VCCSPD

SDA

SCL

SA0-SA2

VCCID

RESET#

PIN NAMES

Address input (Multiplexed)

Bank Select Address

Data Input/Output

Check bits

Data Strobe Input/Output

Clock Input

Clock Enable input

Chip Select Input

Row Address Strobe

Column Address Strobe

Data-in Mask

Write Enable

Power Supply

Power Supply for DQS

Ground

Power Supply for Reference

Serial EEPROM Power Supply

Serial data I/O

Serial clock

Address in EEPROM

VCC Indentiﬁcation Flag

No Connect

Reset Enable

March 2005

Rev. 0

2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

No Preview Available !

White Electronic Designs WV3EG128M72EFSR-D3

ADVANCED

FUNCTIONAL BLOCK DIAGRAM

DQS0

DM0/DQS9

RCS0#

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

RCS1#

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

DQS5

DM5/DQS14

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

DQS1

DM1/DQS10

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

DQS2

DM2/DQS11

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQS3

DM3/DQS12

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

DQ24

DQ25

DQ26

I/O7

I/O6

I/O1

DQ27

I/O0

DQ28

I/O5

DQ29

DQ30

I/O4

I/O3

www.DataSheeDt4QU31.com I/O2

DQS4

DM4/DQS13

CB0

CB1

CB2

CB3

CB4

CB5

CB6

CB7

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

CS# DQS

CS0#

CS1#

BA0-BA1

A0-A12

RAS#

CAS#

CKE0

CKE1

WE#

R RCS0#

E RCS1#

RBA0-RBA1

S RA0-RA12

T RRAS#

RCAS#

RCKE0

RCKE1

RWE#

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

DQS6

DM6/DQS15

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

DQS7

DM6/DQS16

DQ48

DQ49

DQ50

DQ51

DQ52

DQ53

DQ54

DQ55

DQS8

DM7/DQS17

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

CS# DQS

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

CS# DQS

I/O7

I/O6

I/O1

I/O0

I/O5

I/O4

I/O3

I/O2

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

I/O0

I/O1

I/O6

I/O7

I/O2

I/O3

I/O4

I/O5

CS# DQS

BA0-BA1: SDRAMs

A0-A12: SDRAMs

RAS#: SDRAMs

CAS#: SDRAMs

CKE: SDRAMs

WE#: DQRAMs

CK0

CK0#

120

PLL

SCL

SERIAL PD

A0 A1 A2

SA0 SA1 SA2

SDA

DDR SDRAM

V CCSPD

VCCQ

SPD

DDR SDRAMS

PCK

PCK#

RESET#

VCC

VREF

DDR SDRAMS

Note: All resistor values are 22Ω unless otherwise indicated.

VSS DDR SDRAMS

March 2005

Rev. 0

3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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