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PDF MMA8125EG Data sheet ( Hoja de datos )
| Número de pieza | MMA8125EG | |
| Descripción | (MMA8xxxEG) Digital Axis Micromachined | |
| Fabricantes | Motorola Semiconductor Products | |
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Freescale Semiconductor
Technical Data
www.DataSheet4U.com
Digital Axis Micromachined
Accelerometer
The MMA81XXEG (Z-axis) and MMA82XXEG (X-axis) are members of
Freescale’s family of DSI 2.0-compatible accelerometers. These devices
incorporate digital signal processing for filtering, trim and data formatting.
Features
• Available in 20g, 40g, 50g, 100g, 150g, and 250g (MMA82XXEG, X-axis) and
40g, 100g, 150g, and 250g (MMA81XXEG, Z-axis). Additional
g-ranges may be available upon request
• 80 customer-accessible OTP bits
• 10-bit digital data output from 8 to 10 bit DSI output
• 6.3 to 30 V supply voltage
• On-chip voltage regulator
• Internal self-test
• Minimal external component requirements
• RoHS compliant (-40 to +125ºC) 16-pin SOIC package
• Automotive AEC-Q100 qualified
• DSI 2.0 Compliant
• Z-axis transducer is overdamped
Typical Applications
• Crash detection (Airbag)
• Impact and vibration monitoring
• Shock detection.
Document Number: MMA81XXEG
Rev 1, 5/2009
MMA81XXEG
MMA82XXEG
SERIES
SINGLE-AXIS
DSI 2.0
ACCELEROMETER
EG SUFFIX (Pb-free)
16-LEAD SOIC
CASE 475-01
PIN CONNECTIONS
N/C
N/C
CREG
VPP/TEST
CFIL
DOUT
VGND/DIN
CLK
1
2
3
4
5
6
7
8
16 VSS
15 VSS
14 BUSRTN
13 BUSIN
12 BUSOUT
11 HCAP
10 VSS
9 CREG
16-PIN SOIC PACKAGE
© Freescale Semiconductor, Inc., 2009. All rights reserved.
1 page  
1.3 PIN FUNCTIONS
www.DaTthaSehfeoellto4wUi.ncgomparagraphs provide descriptions of the general function of each pin.
1.3.1 HCAP and VSS
Power is supplied to the ASIC through BUSIN or BUSOUT and BUSRTN. The supply voltage is rectified internally and applied
to the HCAP pin. An external capacitor connected to HCAP forms the positive supply for the integrated voltage regulator. VSS is
supply return node. All VSS pins are internally connected to BUSRTN. To obtain specified performance, all VSS nodes should be
connected to the BUSRTN node on the PWB. To ensure stability of the internal voltage regulator and meet DFMEA requirements,
the connection from HCAP to the external capacitor should be as short as possible and should not be routed elsewhere on the
printed wiring assembly.
The voltage on HCAP is monitored. If the voltage falls below a specified level, the device will return the value zero in response to
a short word Read Acceleration Data command, and report the undervoltage condition by setting the Undervoltage (U) flag.
Should the undervoltage condition persist for more than one millisecond, the internal Power-On Reset (POR) circuit is activated
and the device will not respond until the voltage at HCAP is restored to operating levels and the device has undergone post-reset
initialization.
1.3.2 BUSIN
The BUSIN pin is normally connected to the DSI bus and supports bidirectional communication with the master.
MMA81XXEG supports reverse initialization for improved system fault tolerance. In the event that the DSI bus cannot support
communication between the master and BUSIN pin, communication with the master may be conducted via the BUSOUT pin and
the BUSIN pin can be used to access other DSI devices.
1.3.3 BUSOUT
The BUSOUT pin is normally connected to the DSI bus for daisy-chained bus configurations. In support of fault tolerance at the
system level, the BUSOUT pin can be used as an input for reverse initialization and data communication.
The internal bus switch is always open following reset. The bus switch is closed when data bit D6 is set when an Initialization or
Reverse Initialization command is received.
1.3.4 BUSRTN
This pin provides the common return for power and signalling.
1.3.5 CREG
The internal voltage regulator requires external capacitance to the VSS pin for stability. This should be a high grade capacitor
without excessive internal resistance or inductance. An optional electrolytic capacitor may be required if a longer power down
delay is required.
Figure 1-3 illustrates the relationship between capacitance, series resistance and voltage regulator stability. Two CREG pins are
provided for redundancy. It is recommended that both CREG pins are connected to the external capacitor(s) for best system reli-
ability.
700 mΩ
STABLE, UNACCEPTABLE
NOISE PERFORMANCE
ESR
STABLE
0
1 μF
CREG
100 μF
Figure 1-3. Voltage Regulator Capacitance and Series Resistance
Sensors
Freescale Semiconductor
MMA81XXEG
5
5 Page 
3.2.1 Device Serial Number
www.DaAtauSnhieqeute4Us.ecroiaml number is programmed into each device during manufacturing. The serial number is composed of the following
information.
Table 3-2 Serial Number Assignment
Bit Range
Content
S12 - S0
Serial Number
S31 - S13
Lot Number
Lot numbers begin at 1 for all devices produced and are sequentially assigned. Serial numbers begin at 1 for each lot, and are
sequentially assigned. No lot will contain more devices than can be uniquely identified by the 13-bit serial number. Not all allow-
able lot numbers and serial numbers will be assigned.
3.2.2 Type Byte
The Type Byte is programmed at final trim and test to indicate the axis of orientation of the g-cell and the calibrated range of the
device.
Location
Address
Register
$04 TYPE
7
ORDER
Table 3-3 Device Type Register
Bit Function
6543
0 AXIS 0
0
2
RNG2
1
RNG1
0
RNG0
3.2.2.1 Filter Characteristic Bit (ORDER)
This bit denotes the low-pass filter characteristic.
0 - 400 Hz, 4-pole
1 - 180 Hz, 2-pole
3.2.2.2 Bit 6
Bit 6 is reserved. It will always be read as a logic ‘0’ value.
3.2.2.3 Axis of Sensitivity Bit (AXIS)
The AXIS bit indicates direction of sensitivity
0 - Z-axis
1 - X-axis
3.2.2.4 Bit 4, Bit 3
Bit 4 and Bit 3 are reserved. They will always be read as a logic ‘0’ value.
3.2.2.5 Full-Scale Range Bits (RNG2 - RNG0)
These three bits define the calibrated range of the device as follows:
RNG2
0
0
0
0
1
1
1
1
Table 3-4
RNG1
RNG0
00
01
10
11
00
01
10
11
Range
Unused
20g
40g
50g
100g
150g
250g
Unused
Sensors
Freescale Semiconductor
MMA81XXEG
11
11 Page | ||
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