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PDF HT83F80P Data sheet ( Hoja de datos )
| Número de pieza | HT83F80P | |
| Descripción | (HT83Fxx) Flash Type Voice OTP MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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HT83FXX
Flash Type Voice OTP MCU
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
· Operating voltage: 2.7V~3.6V
· System clock: 4MHz~8MHz
· Crystal and RC system oscillator
· 12 I/O pins
· I2C/SPI Bus Serial Interface, shared with PB
· 2K´15 OTP Program Memory
· Between 2M´8 bit and 128K´8 bit flash type data
memory
· 80´8 Data Memory
· Two 8-bit programmable timer counter with 8-stage
prescaler and one time base counter
· 12-bit high quality voltage type D/A output
· PWM circuit direct drive speaker
· Watchdog Timer function
· 4-level subroutine nesting
· 2.7V Low voltage detection, tolerance 5%
· Integrated LDO regulator in
HT83F10P/20P/40P/60P/80P
· Power-down function and wake-up feature reduce
power consumption
· Up to 1ms (0.5ms) instruction cycle with 4MHz (8MHz)
system clock at VDD= 3.6V
· 63 powerful instructions
· One reset pin
· Flash Data Memory can be re-programmed up to
100,000 times
· Flash Data Memory data retention > 10 years
· 44-pin QFP package
General Description
The flash type voice series of MCUs have OTP type
Program Memory and Flash type Voice Memory.
The devices are 8-bit high performance microcontrollers
which include a voice synthesizer and tone generator.
They are designed for applications which require multiple
I/Os and sound effects, such as voice and melody. The
devices can provide various sampling rates and beats,
tone levels, tempos for speech synthesizer and melody
generator.
They also include two integrated high quality, voltage
type DAC outputs and voltage type PWM outputs.
The devices are excellent solutions for versatile voice
and sound effect product applications with their efficient
MCU instructions providing the user with programming
capability for powerful custom applications. The system
frequency can be up to 8MHz at an operating voltage of
2.7V and include a power-down function to reduce
power consumption.
The MCU flash voice memory capacity ranges from
2M´8 bit to 128K´8 bit, into which the user can down-
load their voice data repeatedly.
Rev. 1.00
1 May 12, 2009
1 page  
www.DataSheet4U.com
HT83FXX
Symbol
Parameter
ILDO LDO Output Current
IOL1 I/O Port Sink Current
IOH1 I/O Port Source Current
IOL2 PWM1/PWM2 Sink Current
IOH2 PWM1/PWM2 Sink Current
IAUD AUD Source Current
RPH Pull-high Resistance
Test Conditions
VDD Conditions
¾ VLDO_IN=5.5V
3V VOL=0.1VDD
3V VOH=0.9VDD
3V VOL=0.1VDD
3V VOH=0.9VDD
3V VOH=0.9VDD
3V ¾
Min. Typ. Max. Unit
60 100 ¾ mA
7 ¾ ¾ mA
-3.5
¾
¾ mA
50 ¾ ¾ mA
-14.5
¾
¾ mA
¾ -3 ¾ mA
20 60 100 kW
A.C. Characteristics
Symbol
Parameter
fSYS
fTIMER
tWDTOSC
tWDT1
tWDT2
tRES
tSST
tINT
System Clock
(RC OSC, Crystal OSC)
Timer Inut Frequency
Watchdog Oscillator Period
Watchdog Time-out Period
(WDT OSC)
Watchdog Time-out Period
(System Clock)
External Reset Low Pulse Width
System Start-up Timer Period
Interrupt Pulse Width
Test Conditions
VDD Conditions
¾ 2.7V~3.6V
¾ 2.7V~3.6V
3V ¾
3V Without WDT prescaler
¾ Without WDT prescaler
¾¾
¾ Wake-up from HALT
¾¾
Min.
4
0
45
12
¾
1
¾
1
Note: *tSYS=1/fSYS
Characteristics Curves
· R vs. F Chart Characteristics Curves
Typ.
¾
¾
90
23
1024
¾
1024
¾
Ta=25°C
Max. Unit
8 MHz
8 MHz
180 ms
45 ms
¾ ms
¾ ms
¾ *tSYS
¾ ms
10
8
6
4
2
150
R v s . F C h a rt
3 .3 V
195 285
R (k W )
376
445
Rev. 1.00
5 May 12, 2009
5 Page 
www.DataSheet4U.com
HT83FXX
Because the TBLH register is a read-only register and
cannot be restored, care should be taken to ensure its
protection if both the main routine and Interrupt Service
Routine use table read instructions. If using the table
read instructions, the Interrupt Service Routines may
change the value of the TBLH and subsequently cause
errors if used again by the main routine. As a rule it is
recommended that simultaneous use of the table read
instructions should be avoided. However, in situations
where simultaneous use cannot be avoided, the inter-
rupts should be disabled prior to the execution of any
main routine table-read instructions. Note that all table
related instructions require two instruction cycles to
complete their operation.
Table Location
Instruction
*10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0
TABRDC [m]
P10 P9
P8 @7 @6 @5 @4 @3 @2 @1 @0
TABRDL [m]
1 1 1 @7 @6 @5 @4 @3 @2 @1 @0
Table Location
Note: *10~*0: Current Program ROM table
@7~@0: Write @7~@0 to TBLP pointer register
P10~P8: Write P12~P8 to TBHP pointer register
Data Memory
The Data Memory is a volatile area of 8-bit wide RAM in-
ternal memory and is the location where temporary in-
formation is stored. Divided into two sections, the first of
these is an area of RAM where special function registers
are located. These registers have fixed locations and
are necessary for correct operation of the device. Many
of these registers can be read from and written to di-
rectly under program control, however, some remain
protected from user manipulation. The second area of
RAM Data Memory is reserved for general purpose use.
All locations within this area are read and write accessi-
ble under program control.
General Purpose Data Memory
All microcontroller programs require an area of
read/write memory where temporary data can be stored
and retrieved for use later. It is this area of RAM memory
that is known as General Purpose Data Memory. This
area of Data Memory is fully accessible by the user pro-
gram for both read and write operations. By using the
²SET [m].i² and ²CLR [m].i² instructions individual bits
can be set or reset under program control giving the
user a large range of flexibility for bit manipulation in the
Data Memory.
Structure
The Data Memory has a bank, known as Bank, which is
implemented in 8-bit wide RAM. The RAM Data Memory
is located in Bank 0 which is also subdivided into two sec-
tions, the Special Purpose Data Memory and the General
Purpose Data Memory. The length of these sections is
dictated by the type of microcontroller chosen.
The start address of the RAM Data Memory for all de-
vices is the address ²00H², and the last Data Memory
Special Purpose Data Memory
This area of Data Memory, is located in Bank, where
registers, necessary for the correct operation of the
microcontroller, are stored. Most of the registers are
both readable and writable but some are protected and
are readable only, the details of which are located under
the relevant Special Function Register section. Note
that for locations that are unused, any read instruction to
these addresses will return the value ²00H².
address is ²FFH². Registers which are common to all
microcontrollers, such as ACC, PCL, etc., have the
same Data Memory address.
00H
S p e c ia l P u r p o s e
D a ta M e m o ry
2FH
30H
G e n e ra l P u rp o s e
D a ta M e m o ry
(8 0 B y te s )
7FH
RAM Data Memory Structure
Note: Most of the RAM Data Memory bits can be directly manipulated using the ²SET [m].i² and ²CLR [m].i² instruc-
tions with the exception of a few dedicated bits. The RAM Data Memory can also be accessed through the
Memory Pointer registers MP.
Rev. 1.00
11 May 12, 2009
11 Page | ||
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| PDF Descargar | [ Datasheet HT83F80P.PDF ] | |
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