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LF2272QC20 PDF даташит

Спецификация LF2272QC20 изготовлена ​​​​«LOGIC Devices Incorporated» и имеет функцию, называемую «Colorspace Converter/Corrector (3 x 12-bits)».

Детали детали

Номер произв LF2272QC20
Описание Colorspace Converter/Corrector (3 x 12-bits)
Производители LOGIC Devices Incorporated
логотип LOGIC Devices Incorporated логотип 

9 Pages
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LF2272QC20 Даташит, Описание, Даташиты
DEVICES INCORPORATED
DEVICES INCORPORATED
LF2272
ColorspaLceFC2on2v7er2ter/
ColorspCoarcreectCoro(n3vxe1r2t-ebrit/s)
Corrector (3 x 12-bits)
FEATURES
DESCRIPTION
u 50 MHz Data and Computation
Rate
u Full Precision Internal Calculations
with Output Rounding
u On-board 10-bit Coefficient Storage
u Overflow Capability in Low
Resolution Applications
u Two’s Complement Input and
Output Data Format
u 3 Simultaneous 12-bit Channels
(64 Giga Colors)
u Applications:
• Component Color Standards
Translations (RGB, YIQ, YUV)
• Color-Temperature Conversion
• Image Capturing and Manipulation
• Composite Color Encoding/
Decoding
• Three-Dimensional Perspective
Translation
u Replaces TRW/Raytheon/Fairchild
TMC2272
u 120-pin PQFP
The LF2272 is a high-speed digital
colorspace converter/corrector
consisting of three simultaneous 12-bit
input and output channels for func-
tionality up to 64 Giga (236) colors.
Some of the applications the LF2272
can be used for include phosphor
colorimetry correction, image captur-
ing and manipulation, composite color
encoding/decoding, color matching,
and composite color standards
conversion/transcoding.
The 3 x 3 matrix multiplier (triple dot
product) allows users to easily per-
form three-dimensional perspective
translations or video format conver-
sions at real-time video rates. By
using the LF2272, conversions can be
made from the RGB (color compo-
nent) format to the YIQ (quadrature
encoded chrominance) or YUV (color
difference) formats and vice versa
(YIQ or YUV to RGB). Differing signal
formats in each stage of a system can
be disregarded. For example, using
an LF2272 at each format interface
allows each stage of a system to
operate on the data while in the
appropriate format.
All inputs and outputs, as well as all
control lines, are registered on the
rising edge of clock. The LF2272
operates at clock rates up to 50 MHz
over the full commercial temperature
and supply voltage ranges. A nar-
rower data path can be used to allow
the LF2272 to work with many
different imaging applications.
DETAILS OF OPERATION
All three input ports (A, B, C) and all
three output ports (X, Y, Z) are
utilized to implement a 3 x 3 matrix
multiplication (triple dot product).
Each truncated 12-bit output is the
sum of all three input words multi-
plied by the appropriate coefficients
(Table 1). The pipeline latency is five
clock cycles. Therefore, the sum of
LF2272 BLOCK DIAGRAM
CLK
CWEL1-0
2
{DATA
INPUTS
A11-0
B11-0
C11-0
{COEFFICIENT
INPUTS
KA9-0
KB9-0
KC9-0
12
12
12
10
10
10
9-MULTIPLIER
ARRAY
12 X11-0
12
Y11-0
DATA
OUTPUTS
12 Z11-0
Video Imaging Products
1 08/16/2000–LDS.2272-I









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LF2272QC20 Даташит, Описание, Даташиты
DEVICES INCORPORATED
LF2272
Colorspace Converter/
Corrector (3 x 12-bits)
products will be output five clock
cycles after the input data has been
registered. New output data is
subsequently available every clock
cycle thereafter.
TABLE 1. LATENCY EQUATIONS
X(n+4) = A(n)KA1(n) + B(n)KB1(n) + C(n)KC1(n)
Y(n+4) = A(n)KA2(n) + B(n)KB2(n) + C(n)KC2(n)
DATA FORMATTING
Z(n+4) = A(n)KA3(n) + B(n)KB3(n) + C(n)KC3(n)
The data input ports (A, B, C) and
data output ports (X, Y, Z) are 12-bit
integer two’s complement format.
DATA OVERFLOW
SYSTEMS SMALLER THAN 12-BITS
The coefficient input ports (KA, KB,
KC) are 10-bit fractional two’s
complement format. Refer to
Figures 1a and 1b.
BIT WEIGHTING
The internal sum of products of the
LF2272 can grow to 23 bits. However,
in order to keep the output format
identical to the input format, the X, Y,
and Z outputs are rounded to 12-bit
integer words. The rounding is done
only at the final output stage to allow
accuracy, with correct rounding and
overflow, for applications requiring
less than 12-bit integer words. The
user may adjust the bit weighting by
applying an identical scaling correc-
tion factor to both the input and
output data streams.
Because the LF2272’s matched input
and output data formats accommo-
date unity gain (0 dB), input condi-
tions that could lead to numeric
overflow may exist. To ensure that no
overflow conditions occur, the user
must be aware of the maximum input
data and coefficient word sizes
allowable for each specific algorithm
being performed.
Using a data path less than 12-bits
requires the input data to be right
justified and sign extended to 12-bits
because the LF2272 carries out all
calculations to full precision. Since all
least-significant bits are used, the
desired X, Y, and Z outputs are
rounded correctly and upper-order
output bits are used for overflow.
FIGURE 1A. INPUT FORMATS
Data Input
11 10 9 8 7 6 5 4 3 2 1 0
–211 210 29 28 27 26 25 24 23 22 21 20
(Sign)
Coefficient Input
98765 43210
–20 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 2–9
(Sign)
Internal Sum
20 19 18 17
–211 210 29 28
(Sign)
3210
2–6 2–7 2–8 2–9
FIGURE 1B. OUTPUT FORMAT
Result
11 10 9 8 7 6 5 4 3 2 1 0
–211 210 29 28 27 26 25 24 23 22 21 20
(Sign)
Video Imaging Products
2 08/16/2000–LDS.2272-I









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LF2272QC20 Даташит, Описание, Даташиты
DEVICES INCORPORATED
LF2272
Colorspace Converter/
Corrector (3 x 12-bits)
SIGNAL DEFINITIONS
Power
VCC and GND
+5 V power supply. All pins must be
connected.
Clock
CLK — Master Clock
The rising edge of CLK strobes all
enabled registers. All timing specifi-
cations are referenced to the rising
edge of CLK.
Inputs
A11-0, B11-0, C11-0 — Data Inputs
A, B, and C are the 12-bit registered
data input ports. Data presented to
these ports is latched into the multi-
plier input registers.
TABLE 2. COEFFICIENT INPUTS
INPUT PORT REG. AVAILABLE
KA KA1, KA2, KA3
KB KB1, KB2, KB3
KC KC1, KC2, KC3
Outputs
X11-0, Y11-0, Z11-0 — Data Outputs
X, Y, and Z are the 12-bit registered
data output ports.
Controls
CWEL1-0 — Coefficient Write Enable
The registered coefficient write enable
inputs determine which internal
coefficient register set to update
(Table 3) on the next clock cycle.
TABLE 3. COEFF. REG. UPDATE
CWEL1-0
00
COEFFICIENT SET
Hold All Registers
01 KA1, KB1, KC1
10 KA2, KB2, KC2
11 KA3, KB3, KC3
KA9-0, KB9-0, KC9-0 — Coefficient Inputs
KA, KB, and KC are the 10-bit regis-
tered coefficient input ports. Data
presented to these ports is latched into
the corresponding internal coefficient
register set defined by CWEL1-0
(Table 3) on the next rising edge of
CLK. Table 2 shows which coefficient
registers are available for each coeffi-
cient input port.
Video Imaging Products
3 08/16/2000–LDS.2272-I










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Номер в каталогеОписаниеПроизводители
LF2272QC20Colorspace Converter/Corrector (3 x 12-bits)LOGIC Devices Incorporated
LOGIC Devices Incorporated
LF2272QC25Colorspace Converter/Corrector (3 x 12-bits)LOGIC Devices Incorporated
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