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PDF HT83048 Data sheet ( Hoja de datos )
| Número de pieza | HT83048 | |
| Descripción | (HT83xxx) Q-Voice | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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Preliminary
HT83XXX
Q-VoiceTM
Features
· Operating voltage: 2.4V~5.0V
· Up to 1ms (0.5ms) instruction cycle with 4MHz (8MHz)
system clock
· System clock: 4MHz~8MHz (2.4V)
· RC oscillator for system clock
· Eight I/O pins
· 2K´14-bit program ROM
· 80´8-bit RAM
· Two 8-bit programmable timer counter with 8-stage
prescaler and one time base counter
· Watchdog Timer
· 4-level subroutine nesting
· HALT function and wake-up feature reduce power
consumption
· PWM circuit direct drive speaker or output by
transistor
· 32-pin DIP package
Applications
· Intelligent educational leisure products
· Alert and warning systems
· Sound effect generators
General Description
The HT83XXX series are 8-bit high performance
microcontroller with voice synthesizer and tone genera-
tor. The HT83XXX is designed for applications on multi-
ple I/Os with sound effects, such as voice and melody. It
can provide various sampling rates and beats, tone lev-
els, tempos for speech synthesizer and melody genera-
tor.
The HT83XXX is excellent for versatile voice and sound
effect product applications. The efficient MCU instruc-
tions allow users to program the powerful custom appli-
cations. The system frequency of HT83XXX can be up
to 8MHz under 2.4V and include a HALT function to re-
duce power consumption.
Selection Table
Body
HT83003
Voice ROM Size 64K-bit
Voice Length
3 sec
HT83006
128K-bit
6 sec
HT83009
192K-bit
9 sec
HT83018
384K-bit
18 sec
HT83036
768K-bit
36 sec
HT83048
1024K-bit
48 sec
HT83072
1536K-bit
72 sec
Rev. 0.10
1 August 25, 2003
1 page  
www.DataSheet4U.com
Preliminary
HT83XXX
HT83048/HT83072
Pad No.
1
2
3
4
5
6
7
8
X
-982.145
-876.845
-766.245
-666.245
-555.645
-455.645
-345.045
-245.045
Y
-998.050
-998.050
-998.050
-998.050
-998.050
-998.050
-998.050
-998.050
Pad No.
9
10
11
12
13
14
15
16
X
-135.205
-31.229
758.645
858.645
958.645
841.895
841.895
841.895
Y
-998.050
-998.050
-980.400
-980.400
-980.400
-835.550
-714.050
-575.450
Pad Description
Pad Name I/O
PA0~PA7
I/O
VSS
¾
VDD
¾
VSSA
¾
VDDA
¾
RES
I
OSC1
¾
PWM1, PWM2 O
Mask Option
Wake-up,
Pull-high
or None
¾
¾
¾
¾
¾
RC
¾
Description
Bidirectional 8-bit I/O port. Each bit can be configured as a wake-up input
by mask option. Software instructions determine the CMOS output or
Schmitt trigger input with or without pull-high resistor (mask option).
Negative power supply, ground
Positive power supply
PWM negative power supply, ground
PWM positive power supply, ground
Schmitt trigger reset input, active low
OSC1 is connected to an RC network for the internal system clock.
PWM output for driving a external transistor or speaker
Absolute Maximum Ratings
Supply Voltage ..........................VSS+2.4V to VSS+5.2V
Input Voltage .............................VSS-0.3V to VDD+0.3V
Storage Temperature ...........................-50°C to 125°C
Operating Temperature ..........................-20°C to 70°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
D.C. Characteristics
Symbol
Parameter
VDD Operating Voltage
ISTB Standby Current
IDD Operating Current
IOL I/O Port Sink Current
IOH I/O Port Source Current
IO PWM Source Current
IO PWM Source Current
VIL1 Input Low Voltage (RES)
VIH1 Input High Voltage (RES)
fSYS System Frequency
Test Conditions
VDD Conditions
¾¾
3V No load, system HALT
3V No load, fSYS=4MHz
3V VOL=0.3V
3V VOH=2.7V
3V VOL=0.3V
3V VOH=2.7V
3V ¾
3V ¾
3V ROSC=100kW
ROSC=62kW
Min. Typ. Max. Unit
2.4 ¾
¾1
¾ 1.2
17 ¾
-12 ¾
121 ¾
-81 ¾
¾ 1.5
¾ 2.2
3.7 4.0
7.4 8.0
5.2 V
¾ mA
1.5 mA
¾ mA
¾ mA
¾ mA
¾ mA
¾V
¾V
4.5
MHz
8.6
Rev. 0.10
5 August 25, 2003
5 Page 
www.DataSheet4U.com
Preliminary
Address RAM Mapping
0AH STATUS
0BH INTC
0DH TMR0
0EH TMR0C
10H TMR1
11H TMR1C
12H PA
13H PAC
18H LATCH0H
19H LATCH0M
1AH LATCH0L
26H PWMCR
28H PWMD
2AH LATCHD
2BH~2FH Unused
30H~7FH User data RAM
Note:
R: Read only
W: Write only
R/W: Read/Write
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Description
Status register
Interrupt control register 0
Timer counter 0 register
Timer counter 0 control register
Timer counter 1 register
Timer counter 1 control register
Port A I/O data register
Port A I/O control register
Voice ROM address latch 0 [A17, A16]
Voice ROM address latch 0 [A15~A8]
Voice ROM address latch 0 [A7~A0]
PWM control register
PWM output data D7~D0
Voice ROM data register
User data RAM
HT83XXX
Indirect Addressing Register
Location 00H is indirect addressing registers that are
not physically implemented. Any read/write operation of
[00H] accesses the RAM pointed to by MP0 (01H) re-
spectively. Reading location 00H indirectly returns the
result 00H. While, writing it indirectly leads to no opera-
tion.
Accumulator - ACC (05H)
The accumulator (ACC) is related to the ALU opera-
tions. It is also mapped to location 05H of the RAM and
is capable of operating with immediate data. The data
movement between two data memory locations must
pass through the ACC.
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic opera-
tions and provides the following functions:
· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
· Logic operations (AND, OR, XOR, CPL)
· Rotation (RL, RR, RLC, RRC)
· Increment and Decrement (INC, DEC)
· Branch decision (SZ, SNZ, SIZ, SDZ etc)
Status Register - STATUS (0AH)
This 8-bit STATUS register (0AH) consists of a zero flag
(Z), carry flag (C), auxiliary carry flag (AC), overflow flag
(OV), power down flag (PDF), watchdog time-out flag
(TO). It also records the status information and controls
the operation sequence.
Except the TO and PDF flags, bits in the status register
can be altered by instructions similar to other registers.
Data written into the status register does not alter the TO
or PDF flags. Operations related to the status register,
however, may yield different results from those in-
tended. The TO and PDF flags can only be changed by
a Watchdog Timer overflow, chip power-up, or clearing
the Watchdog Timer and executing the ²HALT² instruc-
tion. The Z, OV, AC, and C flags reflect the status of the
latest operations.
On entering the interrupt sequence or executing the
subroutine call, the status register will not be automati-
cally pushed onto the stack. If the contents of the status
is important, and if the subroutine is likely to corrupt the
status register, the programmer should take precautions
and save it properly.
Rev. 0.10
11 August 25, 2003
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet HT83048.PDF ] | |
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