92HD001 PDF даташит
Спецификация 92HD001 изготовлена «IDT» и имеет функцию, называемую «2-CHANNEL HIGH DEFINITION AUDIO CODEC». |
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Детали детали
Номер произв | 92HD001 |
Описание | 2-CHANNEL HIGH DEFINITION AUDIO CODEC |
Производители | IDT |
логотип |
30 Pages
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
DATA SHEET
92HD001/92HD001D
Description
The 92HD001/92HD001D is a high quality, 2-channel audio
CODEC compatible with the Intel High Definition (HD)
Audio Interface. The 92HD001/92HD001D provides Stereo
24-Bit resolution with sample rates up to 192 KHz. SPDIF
I/O provides connectivity to consumer electronic
equipment. The 92HD001/92HD001D incorporates IDT's
proprietary SD technology to achieve an estimated DAC
SNR of 95dB.
The 92HD001/92HD001D provides high quality, HD Audio
capability to notebook and cost sensitive desktop PC
applications.
Features
• High performance SD technology
• 95dB DAC SNR
• Intel HD Audio Interface
• Two Channel DACs and ADCs with 24-bit
resolution
• Sample rates up to 192 KHz
• Mixer-less design
• Low-latency Karaoke Mode Supported
• Integrated Headphone Amplifiers
• Stereo Microphone
• Supports Stereo Microphone
• Microphone Boost 0, 10, 20, 30, 40dB
• Direct CDROM Recording Mixerless Design
• S/PDIF In and Out
• Universal JacksTM Functionality for jack retasking
• Adjustable VREF Out
• Digital PC Beep to all outputs
• +3.3 V, and +5 V analog power supply options
• 48-pin LQFP RoHS package
• Dolby Sound Room Compliant (92HD001D only)
(System manufacturers must obtain system license from
Dolby.)
• Dolby Home Theater Compliant (92HD001D only)
(System manufacturers must obtain system license from
Dolby.)
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
1
IDT CONFIDENTIAL
92HD001/92HD001D
V 1.0 12/06
No Preview Available ! |
92HD001/92HD001D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table of Contents
1. DESCRIPTION ......................................................................................................................... 11
2. PERFORMANCE ..................................................................................................................... 12
2.1. Audio Fidelity ................................................................................................................................... 12
2.2. Electrical Specifications ................................................................................................................... 12
2.2.1. Absolute Maximum Ratings ............................................................................................... 12
2.2.2. Recommended Operation Conditions ............................................................................... 12
2.3. Power Consumption ........................................................................................................................ 13
2.3.1. Digital ................................................................................................................................. 13
2.3.2. Analog ............................................................................................................................... 13
2.4. 92HD001/92HD001D 5V Analog Performance Characteristics ....................................................... 14
2.5. 92HD001/92HD001D 3.3V Analog Performance Characteristics .................................................... 17
3. EXTENDED FEATURE EXPLANATION ................................................................................. 19
3.1. SPDIF Input ..................................................................................................................................... 19
3.2. SPDIF Output .................................................................................................................................. 19
3.3. Universal JacksTM .......................................................................................................................... 19
3.4. Audio Jack Presence Detect ........................................................................................................... 19
4. BLOCK DIAGRAMS AND TYPICAL HOOKUPS .................................................................... 20
4.1. Functional Block Diagram ................................................................................................................ 20
4.2. 92HD001/92HD001D Typical Connection Diagram for 48-pin LQFP .............................................. 21
4.3. 92HD001/92HD001D Split Independent Power Supply for 48-pin LQFP ........................................ 22
5. WIDGET INFORMATION .........................................................................................................23
5.1. Widget Diagram ............................................................................................................................... 23
5.2. 92HD001/92HD001D Widget List .................................................................................................... 24
5.3. Root Node (NID = 0x00) .................................................................................................................. 25
5.3.1. Root PnpID ....................................................................................................................... 25
5.3.2. Root RevID ..................................................................................................................... 25
5.3.3. Root NodeInfo .................................................................................................................. 26
5.4. AFG Node (NID = 0x01) .................................................................................................................. 26
5.4.1. AFG Reset ........................................................................................................................ 26
5.4.2. AFG NodeInfo ................................................................................................................... 27
5.4.3. AFG Type ......................................................................................................................... 27
5.4.4. AFG GrpCap ..................................................................................................................... 27
5.4.5. AFG FrmtCap ................................................................................................................... 28
5.4.6. AFG StreamCap ............................................................................................................... 29
5.4.7. AFG PwrCap .................................................................................................................... 30
5.4.8. AFG GPIOCap .................................................................................................................. 30
5.4.9. AFG OutAmpCap ............................................................................................................. 31
5.4.10. AFG PwrState ................................................................................................................. 32
5.4.11. AFG UnsolResp .............................................................................................................. 32
5.4.12. AFG GPIO ...................................................................................................................... 33
5.4.13. AFG GPIOEn .................................................................................................................. 34
5.4.14. AFG GPIODir .................................................................................................................. 35
5.4.15. AFG GPIOWake ............................................................................................................. 35
5.4.16. AFG GPIOUnsolEn ......................................................................................................... 36
5.4.17. AFG GPIOSticky ............................................................................................................. 37
5.4.18. AFG SysID ...................................................................................................................... 38
5.5. DAC0Cnvtr Node (NID = 0x02) ....................................................................................................... 39
5.5.1. DAC0Cnvtr Frmt ............................................................................................................... 39
5.5.2. DAC0Cnvtr WCap ............................................................................................................ 40
5.5.3. DAC0Cnvtr PwrState ......................................................................................................... 41
5.5.4. DAC0Cnvtr Stream ........................................................................................................... 42
5.6. ADC0Cnvtr Node (NID = 0x03) ...................................................................................................... 42
5.6.1. ADC0Cnvtr Frmt ............................................................................................................... 42
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
2
IDT CONFIDENTIAL
92HD001/92HD001D
V 1.0 12/06
No Preview Available ! |
92HD001/92HD001D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
5.6.2. ADC0Cnvtr WCap ............................................................................................................ 43
5.6.3. ADC0Cnvtr ConnLen ........................................................................................................ 44
5.6.4. ADC0Cnvtr ConnLst ......................................................................................................... 45
5.6.5. ADC0Cnvtr ProcState ....................................................................................................... 45
5.6.6. ADC0Cnvtr PwrState ........................................................................................................ 46
5.6.7. ADC0Cnvtr Stream ........................................................................................................... 47
5.7. SPDIFinCnvtr Node (NID = 0x04) ................................................................................................... 47
5.7.1. SPDIFinCnvtr Frmt ........................................................................................................... 47
5.7.2. SPDIFinCnvtr WCap ......................................................................................................... 48
5.7.3. SPDIFinCnvtr FrmtCap ..................................................................................................... 49
5.7.4. SPDIFinCnvtr StreamCap ................................................................................................ 50
5.7.5. SPDIFinCnvtr ConnLen .................................................................................................... 51
5.7.6. SPDIFinCnvtr ConnLst ..................................................................................................... 51
5.7.7. SPDIFinCnvtr Stream ....................................................................................................... 52
5.7.8. SPDIFinCnvtr DigCtl ......................................................................................................... 52
5.8. SPDIFoutCnvtr Node (NID = 0x05) ................................................................................................. 53
5.8.1. SPDIFoutCnvtr Frmt ......................................................................................................... 53
5.8.2. SPDIFoutCnvtr WCap ...................................................................................................... 54
5.8.3. SPDIFoutCnvtr FrmtCap .................................................................................................. 55
5.8.4. SPDIFoutCnvtr StreamCap .............................................................................................. 56
5.8.5. SPDIFoutCnvtr Stream ..................................................................................................... 57
5.8.6. SPDIFoutCnvtr DigCtl ....................................................................................................... 57
5.9. DAC0Mux Node (NID = 0x07) ........................................................................................................ 58
5.9.1. DAC0Mux WCap .............................................................................................................. 58
5.9.2. DAC0Mux ConnLen .......................................................................................................... 59
5.9.3. DAC0Mux ConnSel .......................................................................................................... 60
5.9.4. DAC0Mux ConnLst ........................................................................................................... 60
5.9.5. DAC0Mux LR .................................................................................................................... 60
5.10. DigInPin Node (NID = 0x08) .......................................................................................................... 61
5.10.1. DigInPin WCap ............................................................................................................... 61
5.10.2. DigInPin Cap .................................................................................................................. 62
5.10.3. DigInPin PwrState .......................................................................................................... 63
5.10.4. DigInPin Ctl ...................................................................................................................... 63
5.10.5. DigInPin UnsolResp ....................................................................................................... 64
5.10.6. DigInPin Sense ............................................................................................................... 64
5.10.7. DigInPin EAPD ............................................................................................................... 65
5.10.8. DigInPin Config ............................................................................................................... 65
5.11. DigOutPin Node (NID = 0x09) ....................................................................................................... 66
5.11.1. DigOutPin WCap ............................................................................................................ 66
5.11.2. DigOutPin Cap ................................................................................................................ 67
5.11.3. DigOutPin ConnLen ........................................................................................................ 68
5.11.4. DigOutPin ConnSel ........................................................................................................ 69
5.11.5. DigOutPin ConnLst ......................................................................................................... 69
5.11.6. DigOutPin Ctl .................................................................................................................. 69
5.11.7. DigOutPin Config ............................................................................................................ 70
5.12. ADC0Mux Node (NID = 0x0A) ....................................................................................................... 71
5.12.1. ADC0Mux VolRight ......................................................................................................... 71
5.12.2. ADC0Mux VolLeft ........................................................................................................... 71
5.12.3. ADC0Mux WCap ............................................................................................................ 72
5.12.4. ADC0Mux OutAmpCap .................................................................................................. 73
5.12.5. ADC0Mux ConnLen ........................................................................................................ 73
5.12.6. ADC0Mux ConnLst ......................................................................................................... 74
5.12.7. ADC0Mux LR .................................................................................................................. 74
5.13. MasterVol Node (NID = 0x0B) ....................................................................................................... 75
5.13.1. MasterVol Right .............................................................................................................. 75
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
3
IDT CONFIDENTIAL
92HD001/92HD001D
V 1.0 12/06
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Номер в каталоге | Описание | Производители |
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