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Спецификация 5890 изготовлена ​​​​«Allegro MicroSystems» и имеет функцию, называемую «(5890 / 5891) LATCHED SOURCE DRIVERS».

Детали детали

Номер произв 5890
Описание (5890 / 5891) LATCHED SOURCE DRIVERS
Производители Allegro MicroSystems
логотип Allegro MicroSystems логотип 

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GROUND 1
CLOCK
SERIAL
DATA IN
2 CLK
3
SHIFT
REGISTER
STROBE 4 ST LATCHES
16
VDD 15
OE 14
VBB 13
SERIAL
DATA OUT
LOGIC
SUPPLY
OUTPUT
ENABLE
LOAD
SUPPLY
OUT1 5
12 OUT 8
OUT 2 6
11 OUT7
OUT3 7
10 OUT6
OUT 4 8
9 OUT5
Dwg. PP-026-2A
Note the suffix ‘A’ devices (DIP) and the suffix
‘LW’ devices (SOIC) are electrically identical and
share a common terminal number assignment.
ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Output Voltage, VOUT
(UCN5890A & UCN5890LW) ......... 80 V
(UCN5891A & UCN5891LW) ......... 50 V
Logic Supply Voltage Range,
VDD .................................... 4.5 V to 15 V
Driver Supply Voltage Range, VBB
(UCN5890A/LW) ................ 20 V to 80 V
(UCN5891A/LW) ............... 5.0 V to 50 V
Input Voltage Range,
VIN ........................ -0.3 V to VDD + 0.3 V
Continuous Output Current,
IOUT ........................................... -500 mA
Allowable Package Power Dissipation,
PD ......................................... See Graph
Operating Temperature Range,
TA .................................. -20°C to +85°C
Storage Temperature Range,
TS ................................ -55°C to +150°C
Caution: CMOS devices have input static
protection, but are susceptible to damage when
exposed to extremely high static electrical
charges.
5890 AND
5891
BIMOS II 8-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
Frequently applied in non-impact printer systems, the UCN5890A,
UCN5890LW, UCN5891A, and UCN5891LW are BiMOS II serial-input,
latched source (high-side) drivers. The octal, high-current smart-power ICs
merge an 8-bit CMOS shift register, associated CMOS latches, and CMOS
control logic (strobe and output enable) with sourcing power Darlington
outputs. Typical applications include multiplexed LED and incandescent
displays, relays, solenoids, and similar peripheral loads to a maximum of
-500 mA per output.
Except for output voltage ratings, these smart high-side driver ICs are
equivalent. The UCN5890A/LW are rated for operation with load supply
voltages of 20 V to 80 V and a minimum output sustaining voltage of 50 V.
The UCN5891A/LW are optimized for operation with supply voltages of 5 V
to 50 V (35 V sustaining).
BiMOS II devices have higher data-input rates than the original BiMOS
circuits. With a 5 V supply, they will operate to at least 3.3 MHz. At 12 V,
higher speeds are possible. The CMOS inputs are compatible with standard
CMOS and NMOS logic levels. TTL circuits may require the use of appropri-
ate pull-up resistors to ensure a proper input-logic high. A CMOS serial data
output, allows cascading these devices in multiple drive-line applications
required by many dot matrix, alphanumeric, and bar graph displays.
Suffix ‘A’ devices are supplied in a standard dual in-line plastic package
with copper lead frame for enhanced package power dissipation characteris-
tics. Suffix ‘LW’ devices are supplied in a standard wide-body SOIC package
for surface-mount applications. Similar driver, featuring reduced output
saturation voltage, are the UCN5895A and A5895SLW. Complementary,
8-bit serial-input, latched sink drivers are the Series UCN5820A.
FEATURES
I 50 V or 80 V Source Outputs
I Output Current to -500 mA
I Output Transient-Suppression Diodes
I To 3.3 MHz Data-lnput Rate
I Low-Power CMOS Logic and Latches
Always order by complete part number, e.g., UCN5891LW .









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5890 AND 5891
8-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
2.5
2.0 SUFFIX 'A', R θJA = 60°C/W
1.5
1.0
SUFFIX 'LW', R = 80°C/W
θJA
0.5
0
25 50 75 100 125 150
AMBIENT TEMPERATURE IN °C
Dwg. GP-018B
TYPICAL INPUT CIRCUIT
VDD
IN
Dwg. EP-010-4A
TYPICAL OUTPUT DRIVER
VBB
OUT
Dwg. No. A-12,648
FUNCTIONAL BLOCK DIAGRAM
CLOCK
SERIAL
DATA IN
8-BIT SERIAL-PARALLEL SHIFT REGISTER
STROBE
GROUND
MOS
BIPOLAR
LATCHES
SERIAL
DATA OUT
VDD
OUTPUT
ENABLE
VBB
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
Dwg. No. A-12,654
Number of
Outputs On at
IOUT = -200 mA
8
7
6
5
4
3
2
1
UCN5890/91A Max. Allowable Duty Cycle
50°C
at TA of
60°C
70°C
53%
60%
70%
83%
100%
100%
100%
100%
47%
54%
64%
75%
94%
100%
100%
100%
41%
48%
56%
67%
84%
100%
100%
100%
Number of
Outputs On at
IOUT = -200 mA
8
7
6
5
4
3
2
1
UCN5890/91LW Max. Allowable Duty Cycle
at TA of
50°C
60°C
70°C
40%
45%
53%
62%
80%
100%
100%
100%
35%
41%
48%
56%
71%
96%
100%
100%
31%
36%
42%
50%
62%
84%
100%
100%
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1985, 2000 Allegro MicroSystems, Inc.









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5890 AND 5891
8-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 80 V (UCN5890A/LW) or 50 V
(UCN5891A/LW), VDD = 5 V and 12 V (unless otherwise noted).
Characteristic
Output Leakage Current
Symbol
ICEX
VBB
Max.
Output Saturation Voltage VCE(SAT)
50 V
Output Sustaining Voltage VCE(sus)
Max.
Input Voltage
VIN(1)
50 V
Input Current
VIN(0)
IIN(1)
50 V
50 V
Input lmpedance
ZIN 50 V
Max. Clock Frequency
Serial Data Output
Resistance
Turn-On Delay
Turn-Off Delay
Supply Current
fc
ROUT
tPLH
tPHL
IBB
50 V
50 V
50 V
50 V
50 V
lDD 50 V
Diode Leakage Current
Diode Forward Voltage
IR Max.
VF Open
Test Conditions
TA = +25°C
TA = +70°C
IOUT = -100 mA
IOUT = -225 mA
IOUT = -350 mA
IOUT = -350 mA, L = 2 mH, UCN5891A/LW
IOUT = -350 mA, L = 2 mH, UCN5890A/LW
VDD = 5.0 V
VDD = 12 V
VDD = 5 V to 12 V
VDD = VIN = 5.0 V
VDD = VIN = 12 V
VDD = 5.0 V
VDD = 12 V
VDD = 5.0 V
VDD = 12 V
Output Enable to Output, IOUT = -350 mA
Output Enable to Output, IOUT = -350 mA
All outputs on, All outputs open
All outputs off
VDD = 5 V, All outputs off, Inputs = 0 V
VDD = 12 V, All outputs off, Inputs = 0 V
VDD = 5 V, One output on, All Inputs = 0 V
VDD = 12 V, One output on, All Inputs = 0 V
TA = +25°C
TA = +70°C
IF = 350 mA
Min.
35
50
3.5
10.5
-0.3
100
50
3.3*
Limits
Max.
-50
-100
1.8
1.9
2.0
5.3
12.3
+0.8
50
240
20
6.0
2.0
10
10
200
100
200
1.0
3.0
50
100
2.0
Units
µA
µA
V
V
V
V
V
V
V
V
µA
µA
k
k
MHz
k
k
µs
µs
mA
µA
µA
µA
mA
mA
µA
µA
V
NOTES: Turn-off delay is influenced by load conditions. Systems applications well below the specified output loading may require
timing considerations for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem
pole configuration.
Positive (negative) current is defined as going into (coming out of) the specified device pin.
* Operation at a clock frequency greater than the specified minimum value is possible but not warranteed.
www.allegromicro.com










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