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PDF MPC859TTS Data sheet ( Hoja de datos )

Número de pieza MPC859TTS
Descripción Technical Summary
Fabricantes Motorola Semiconductors 
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Advance Information
MPC859TTS/D
Rev. 1.2, 4/2003
MPC859P/859T/859DSL
PowerQUICC™
Family Technical Summary
Freescale Semiconductor, Inc.
This document provides an overview of the MPC859P/859T/859DSL PowerQUICC™
Family, describing major functions and features. The MPC859P/859T/859DSL PowerQUICC
Family contains a PowerPC™ processor core. The topics covered include:
Section
Page
Section 1.1, “Features”
2
Section 1.2, “Embedded MPC8xx Core”
6
Section 1.3, “System Interface Unit (SIU)”
7
Section 1.4, “PCMCIA Controller”
8
Section 1.5, “Power Management”
8
Section 1.6, “Communications Processor Module (CPM)”
8
Section 1.7, “ATM Capabilities”
8
Section 1.8, “Differences between MPC859P/859T and MPC859DSL”
9
Section 1.9, “Document Revision History”
9
The MPC859P/859T/859DSL PowerQUICC Family is a 0.18 micron version of the MPC860
PowerQUICC Family and can operate up to 133 MHz on the MPC8xx Core with a 66 MHz
external bus. The MPC866 Family has a 1.8 V core and has a 3.3 V I/O operation with 5 V
TTL compatibility. The MPC859P/859T/859DSL Integrated Communications Controller
Family is a versatile one-chip integrated microprocessor and peripheral combination that can
be used in a variety of controller applications. It particularly excels in both communications
and networking systems.
The MPC859P/859T/859DSL Family is a PowerPC architecture-based derivative of
Motorola’s MPC860 Quad Integrated Communications Controller (PowerQUICC). The CPU
on the MPC859P/859T/859DSL is the MPC8xx core, a 32-bit microprocessor which
implements the PowerPC architecture, incorporating memory management units (MMUs) and
instruction and data caches. The MPC859P is mainly described in this document.
Table 1 shows the functionality supported by the members of the MPC859P family:
For More Information On This Product,
Go to: www.freescale.com

1 page




MPC859TTS pdf
Freescale Semiconductor, Inc.
Features
— Supports T1, CEPT, PCM highway, user defined
— 1- or 8-bit resolution
— Allows independent transmit and receive routing, frame synchronization, clocking
— Allows dynamic changes
— Can be internally connected to three serial channels (one SCC and two SMCs)
— Parallel interface port (PIP)
— Centronics interface support
— Supports fast connection between compatible ports on MPC859P/859T or other MPC8xx
devices.
• PCMCIA interface
— Master (socket) interface, release 2.1 compliant
— Supports two independent PCMCIA sockets. The MPC859DSL supports only one PCMCIA
socket (on Port B).
— 8 memory or I/O windows supported
• Debug interface
— Eight comparators: four operate on instruction address, two operate on data address, and two
operate on data
— Supports conditions: = < >
— Each watchpoint can generate a break point internally
• Normal High and Normal Low Power Modes to conserve power
• 1.8 V Core and 3.3 V I/O operation with 5-V TTL compatibility
• 357-pin ball grid array (BGA) package
MOTOROLA
MPC859P/859T/859DSL PowerQUICC™ FamilyTechnical Summary
For More Information On This Product,
Go to: www.freescale.com
5

5 Page





MPC859TTS arduino
Freescale Semiconductor, Inc.
Document Revision History
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MOTOROLA
MPC859P/859T/859DSL PowerQUICC™ FamilyTechnical Summary
For More Information On This Product,
Go to: www.freescale.com
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