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PDF DP83848J Data sheet ( Hoja de datos )
| Número de pieza | DP83848J | |
| Descripción | Mini LS Commercial Temperature Single Port 10/100 Ethernet Transceiver | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DP83848J (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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www.DataSheet4U.com
December 2006
DP83848J PHYTER® Mini LS
Commercial Temperature Single Port 10/100 Ethernet Transceiver
General Description
Features
The DP83848J addresses the quality, reliability and small •
form factor required for space sensitive applications in •
embedded systems.
•
The DP83848J offers performance far exceeding the IEEE
specifications, with superior interoperability and industry
•
leading performance beyond 137m of Cat-V cable. The •
DP83848J also offers Auto-MDIX to remove cabling com- •
plications. DP83848J has superior ESD pro-tection,
greater than 4KV Human Body Model, providing extremely
•
high reliability and robust operation, ensuring a high level •
performance in all applications.
•
Low-power 3.3V, 0.18µm CMOS technology
3.3V MAC Interface
Auto-MDIX for 10/100 Mb/s
Energy Detection Mode
MII Interface
MII serial management interface (MDC and MDIO)
IEEE 802.3u Auto-Negotiation and Parallel Detection
IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
IEEE 802.3u PCS, 100BASE-TX transceivers and filters
DP83848J offers two flexible LED indicators - one for Link •
and the other for Speed.
The DP83848J is offered in a tiny 6mm x 6mm LLP 40-pin
package and is ideal for industrial controls, building/factory •
automation, transportation, test equipment and wireless
base stations.
•
•
Integrated ANSI X3.263 compliant TP-PMD physical su-
blayer with adaptive equalization and Baseline Wander
compensation
Error-free Operation beyond 137 meters
ESD protection - greater than 4KV Human body model
LED support for Link and Speed
Applications
• Single register access for complete PHY status
• Peripheral devices
• Mobile devices
• 10/100 Mb/s packet BIST (Built in Self Test)
• 40 pin LLP package (6mm) x (6mm) x (0.8mm)
• Factory and building automation
• Basestations
System Diagram
MPU/CPU
MII
PHYTER Mini LS
10/100 Ethernet
Transceiver
Clock
Source
Status
LED/s
Typical Ethernet Application
PHYTER® is a registered trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
10BASE-T
or
100BASE-TX
www.national.com
1 page  
8.2.18 10 Mb/s Jabber Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
8.2.19 10BASE-T Normal Link Pulse Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.2.20 Auto-Negotiation Fast Link Pulse (FLP) Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.2.21 100BASE-TX Signal Detect Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8.2.22 100 Mb/s Internal Loopback Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8.2.23 10 Mb/s Internal Loopback Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
8.2.24 Isolation Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
5 www.national.com
5 Page 
1.6 STRAP OPTIONS
DP83848J uses many functional pins as strap options. The
values of these pins are sampled during reset and used to
strap the device into specific modes of operation. The strap
option pin assignments are defined below. The functional
pin name is indicated in parentheses.
A 2.2 kΩ resistor should be used for pull-down or pull-up to
change the default strap option. If the default option is
required, then there is no need for external pull-up or pull
down resistors. Since these pins may have alternate func-
tions after reset is deasserted, they should not be con-
nected directly to VCC or GND.
Signal Name
PHYAD0 (COL)
PHYAD1 (RXD_0)
PHYAD2 (RXD_1)
PHYAD3 (RXD_2)
PHYAD4 (RXD_3)
AN0 (LED_LINK)
AN1 (LED_SPEED)
Type
S, O, PU
S, O, PD
S, O, PU
S, O, PU
Pin #
35
36
37
38
39
22
21
Description
PHY ADDRESS [4:0]: The DP83848J provides five PHY address
pins, the state of which are latched into the PHYCTRL register at
system Hardware-Reset.
The DP83848J supports PHY Address strapping values 0
(<00000>) through 31 (<11111>). A PHY Address of 0 puts the
part into the MII Isolate Mode. The MII isolate mode must be se-
lected by strapping Phy Address 0; changing to Address 0 by reg-
ister write will not put the Phy in the MII isolate mode. Please refer
to section 2.3 for additional information.
PHYAD0 pin has weak internal pull-up resistor.
PHYAD[4:1] pins have weak internal pull-down resistors.
These input pins control the advertised operating mode of the de-
vice according to the following table. The value on these pins are
set by connecting them to GND (0) or VCC (1) through 2.2 kΩ re-
sistors. These pins should NEVER be connected directly to
GND or VCC.
The value set at this input is latched into the DP83848J at Hard-
ware-Reset.
The float/pull-down status of these pins are latched into the Basic
Mode Control Register and the Auto_Negotiation Advertisement
Register during Hardware-Reset.
The default for DP83848J is 11 since these pins have an internal
pull-up.
LED_CFG (CRS)
MDIX_EN (RX_ER)
S, O, PU
S, O, PU
AN1
0
0
1
1
AN0
Advertised Mode
0 10BASE-T, Half/Full-Duplex
1 100BASE-TX, Half/Full-Duplex
0 10BASE-T, Half-Duplex
100BASE-TX, Half-Duplex
1 10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
33 LED CONFIGURATION: This strapping option determines the
mode of operation of the LED pins. Default is Mode 1. Mode 1 and
Mode 2 can be controlled via the strap option. All modes are con-
figurable via register access.
SeeTable 3 for LED Mode Selection.
34 MDIX ENABLE: Default is to enable MDIX. This strapping option
disables Auto-MDIX. An external pull-down will disable Auto-
MDIX mode.
11 www.national.com
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DP83848J.PDF ] | |
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