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PDF IRHNA593064 Data sheet ( Hoja de datos )
| Número de pieza | IRHNA593064 | |
| Descripción | (IRHNA593064 / IRHNA597064) RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2) | |
| Fabricantes | International Rectifier | |
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PD-94604B
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-2)
Product Summary
Part Number Radiation Level RDS(on)
IRHNA597064 100K Rads (Si) 0.016Ω
IRHNA593064 300K Rads (Si) 0.016Ω
ID
-56A*
-56A*
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space appli-
cations. These devices have been characterized for
Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
of low RDS(on) and low gate charge reduces the power
losses in switching applications such as DC to DC
converters and motor control. These devices retain
all of the well established advantages of MOSFETs
such as voltage control, fast switching, ease of paral-
leling and temperature stability of electrical param-
eters.
Absolute Maximum Ratings
Parameter
ID @ VGS = -12V, TC = 25°C Continuous Drain Current
ID @ VGS = -12V, TC = 100°C Continuous Drain Current
IDM Pulsed Drain Current À
PD @ TC = 25°C
Max. Power Dissipation
Linear Derating Factor
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
* Current is limited by package
For footnotes refer to the last page
www.irf.com
IRHNA597064
60V, P-CHANNEL
5 TECHNOLOGY
SMD-2
Features:
n Single Event Effect (SEE) Hardened
n Ultra Low RDS(on)
n Low Total Gate Charge
n Proton Tolerant
n Simple Drive Requirements
n Ease of Paralleling
n Hermetically Sealed
n Surface Mount
n Ceramic Package
n Light Weight
-56*
-56
-224
250
2.0
±20
725
-56
25
2.1
-55 to 150
300 (for 5s)
3.3 (Typical)
Pre-Irradiation
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
oC
g
1
11/01/04
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1 page  
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Pre-Irradiation
IRHNA597064
12000
10000
8000
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
6000
4000
Coss
2000
0
1
Crss
10
-VDS, Drain-to-Source Voltage (V)
100
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
16
ID = -56A
12
VDS= -48V
VDS= -30V
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0 20 40 60 80 100 120 140 160
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
TJ = 150°C
100
10
TJ = 25°C
1
0.1
0.5
VGS = 0V
1.5 2.5 3.5 4.5
-VSD , Source-to-Drain Voltage (V)
5.5
Fig 7. Typical Source-Drain Diode
Forward Voltage
www.irf.com
1000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100
100µs
1ms
10
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
1
1 10
100
-VDS , Drain-to-Source Voltage (V)
1000
Fig 8. Maximum Safe Operating Area
5
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