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PDF HS3120 Data sheet ( Hoja de datos )

Número de pieza HS3120
Descripción Double Buffered 12-Bit MDAC
Fabricantes Satcon Electronics 
Logotipo Satcon Electronics Logotipo



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No Preview Available ! HS3120 Hoja de datos, Descripción, Manual

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D ouble Buffered 12-Bit MD AC
HS 3120
Sipex D ata Converter Line
FE A TU R E S
• M onolithic Construction
• 12 Bit Resolution
• 0.01% Non-Linearity
• jup Compatible
• 4-Quadrant M ultiplication
• Latch-up Protected
DESCRIPTION
The HS 3120 is a precision monolithic 12-bit
multiplying DA C with internal two-stage input
storage registers for easy interfacing with
microprocessor busses. It is packaged in a 28-pin DIP
to give high I/O design flexibility.
DOUBLE BUFFERED - The input registers are sectioned
into 3 segments of 4 bits each, all individually
controls are level-triggered to allow static or dynamic
addressable. The DA C-register, following the input
operation.
registers, is a parallel 12-bit register for holding thDeataSheet4U.VcEoRmSA TILE OUTPUTS - A total of 5 output lines are
DA C data while the input registers are updated. Only
provided by the HS 3120 to allow unipolar and
the data held in the DA C register determines the
bipolar output connection with a minimum of
analog output value of the converter.
external components. The feedback resistor is
M ICRO PROCESSOR COM PA TIBLE — The HS 3120 has
been designed for great flexibility in connecting to
bus-oriented systems. The 12 data inputs are
organized into 3 independent addressable 4-bit input
registers such that the HS 3120 can be connected to
either a 4, 8 or 16-bit data bus. The control logic of
the HS 3120 includes chip enable and latch enable
inputs for flexible memory mapping. All
internal. The resistor ladder network termination is
externally available, thus eliminating an external
resistor for the 1 LSB offset in bipolar mode.
M ONOLITHIC CM OS CONSTRUCTION - The HS 3120 is
a one-chip CM OS circuit with a resistor ladder
network designed for 0.01% linearity without laser
trimming. Small chip size and high manufacturing
yields result in greatly reduced cost.
FUNCTIONAL DIAGRAM
CE
HBE
M BE
LBE
LDA C
22
25
24
23
21
CONTROL
LOGIC
(M SB)
BIT 1 2 3 4
9 10 11 12
56 78
13 14 15 16
INPUT REGISTER INPUT REGISTER
DAC REGISTER
(LSB)
9 10 11 BIT 12 V REF
17 18 19 20
4
INPUT REGISTER
12 BIT M DAC
R
R/2 R/2
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HS 3120
28 26 27 8
2
VDD1 VDD2 GND GND
LDTR
165 Cedar Hill Street, Marlborough, MA 01752 Tel: 508.485.6350 Fax: 508.485.5168
www.satconelectronics.com
DataSheet4U.com
5 FB1
6 I01
7 I02
1 FB4
3 FB3

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