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PDF MTP10N10EL Data sheet ( Hoja de datos )
| Número de pieza | MTP10N10EL | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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( DataSheet : www.DataSheet4U.com )
MTP10N10EL
Preferred Device
Power MOSFET
10 A, 100 V, Logic Level, N−Channel TO−220
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. The energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Pb−Free Package is Available
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tp ≤ 10 ms)
Drain Current
− Continuous @ TC = 25°C
− Continuous @ TC = 100°C
− Single Pulse (tp ≤ 10 ms)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TC = 25°C
(Note 1)
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
100 Vdc
100 Vdc
± 15 Vdc
± 20 Vpk
10 Adc
6.0
35 Apk
40 Watts
0.32 W/°C
1.75 Watts
Operating and Storage Temperature
Range
TJ, Tstg
−55 to
150
°C
Single Pulse Drain−to−Source Avalanche
EAS
mJ
Energy − Starting TJ = 25°C
50
(VDD = 25 Vdc, VGS = 5.0 Vdc, Peak
IL = 10 Adc, L = 1.0 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case°
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
RqJC
RqJA
RqJA
°C/W
3.13
100
71.4
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 secs
TL
260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
http://onsemi.com
10 A, 100 V
RDS(on) = 0.22 W
N−Channel
D
G
S
MARKING DIAGRAM
& PIN ASSIGNMENT
44
Drain
1
2
3
TO−220AB
CASE 221A
STYLE 5
MTP10N10EL
LLYWW
1
Gate
3
Source
2
Drain
MTP10N10EL
LL
Y
WW
= Device Code
= Location Code
= Year
= Work Week
ORDERING INFORMATION
Device
MTP10N10EL
Package
TO−220AB
Shipping
50 Units/Rail
MTP10N10ELG TO−220AB
(Pb−Free)
50 Units/Rail
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 4
www.DataSheet4U.com
1
Publication Order Number:
MTP10N10EL/D
www.DataSheet4U.com
1 page  
MTP10N10EL
12 90
QT 75
8 VGS 60
45
4 Q1 Q2 TJ = 25°C 30
ID = 10 A
15
0 Q3
02 4
VDS
0
6 8 10
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
1000
100
10
TJ = 25°C
ID = 10 A
VDS = 100 V
VGS = 5 V
tr
tf
td(off)
td(on)
1 1 10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
10
VGS = 0 V
TJ = 25°C
8
100
6
4
2
0
0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1.0
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
Resistance−General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
http://onsemi.com
5
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| PDF Descargar | [ Datasheet MTP10N10EL.PDF ] | |
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