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GS71116TP PDF даташит

Спецификация GS71116TP изготовлена ​​​​«GSI Technology» и имеет функцию, называемую «(GS71116x) 64K x 16 1Mb Asynchronous SRAM».

Детали детали

Номер произв GS71116TP
Описание (GS71116x) 64K x 16 1Mb Asynchronous SRAM
Производители GSI Technology
логотип GSI Technology логотип 

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GS71116TP Даташит, Описание, Даташиты
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
64K x 16
1Mb Asynchronous SRAM
GS71116TP/J/U
10, 12, 15ns
3.3V VDD
Center VDD & VSS
Features
SOJ 64K x 16 Pin Configuration
• Fast access time: 10, 12, 15ns
• CMOS low power operation: 100/85/70 mA at min. cycle time.
A4 1
A3 2
44 A5
43 A6
• Single 3.3V ± 0.3V power supply
A2 3
42 A7
• All inputs and outputs are TTL compatible
• Byte control
• Fully static operation
m• Industrial Temperature Option: -40° to 85°C
• Package line up
oJ: 400mil, 44 pin SOJ package
TP: 400mil, 44 pin TSOP Type II package
.cU: 6 mm x 8 mm Fine Pitch Ball Grid Array package
UDescription
t4The GS71116 is a high speed CMOS static RAM organized as
65,536-words by 16-bits. Static design eliminates the need for exter-
nal clocks or timing strobes. Operating on a single 3.3V power supply
eand all inputs and outputs are TTL compatible. The GS71116 is avail-
eable in a 6x8 mm Fine Pitch BGA package as well as in 400 mil SOJ
and 400 mil TSOP Type-II packages.
ShPin Descriptions
taSymbol
A0 to A15
aDQ1 to DQ16
CE
.DLB
wUB
wWE
wOE
Description
Address input
Data input/output
Chip enable input
Lower byte enable input
(DQ1 to DQ8)
Upper byte enable input
(DQ9 to DQ16)
Write enable input
Output enable input
A1 4
A0 5
Top view
CE 6
DQ1 7
DQ2 8
DQ3 9
DQ4 10
VDD 11
44 pin
VSS 12
DQ5 13
SOJ
DQ6 14
DQ7 15
DQ8 16
WE 17
A15 18
A14 19
A13 20
A12 21
NC 22
41 OE
40 UB
39 LB
38 DQ16
37 DQ15
36 DQ14
35 DQ13
34 VSS
33 VDD
32 DQ12
31 DQ11
30 DQ10
29 DQ9
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
Fine Pitch BGA 64K x 16 Bump Configuration
123456
A LB OE A0 A1 A2 NC
B DQ16 UB A3 A4 CE DQ1
C DQ14 DQ15 A5 A6 DQ2 DQ3
D VSS DQ13 NC A7 DQ4 VDD
E VDD DQ12 NC NC DQ5 VSS
VDD +3.3V power supply
VSS Ground
NC No connect
F DQ11 DQ10 A8 A9 DQ7 DQ6
G DQ9 NC A10 A11 WE DQ8
H NC A12 A13 A14 A15 NC
6mm x 8mm, 0.75mm Bump Pitch
Top View
Rev: 1.06 6/2000
1/15
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.
M









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GS71116TP Даташит, Описание, Даташиты
TSOP-II 64K x 16 Pin Configuration
A4 1
A3 2
A2 3
A1 4
Top view
A0 5
CE 6
DQ1 7
DQ2 8
DQ3 9
DQ4 10
VDD 11
44 pin
VSS
DQ5
12
13
TSOP II
DQ6 14
DQ7 15
DQ8 16
WE 17
A15 18
A14 19
A13 20
A12 21
NC 22
44 A5
43 A6
42 A7
41 OE
40 UB
39 LB
38 DQ16
37 DQ15
36 DQ14
35
34
33
32
31
DQ13
VSS
VDD
DQ12
DQ11
30 DQ10
29 DQ9
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
Block Diagram
A0 Row
Address Decoder
Input
Buffer
A15
CE
WE
OE
Control
UB _____
LB _____
Memory Array
Column
Decoder
I/O Buffer
DQ1 DQ16
GS71116TP/J/U
Rev: 1.06 6/2000
2/15
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.









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GS71116TP Даташит, Описание, Даташиты
GS71116TP/J/U
Truth Table
CE OE WE LB UB
HXXXX
LL
L LHLH
HL
LL
LXL LH
HL
L HHX X
L XXHH
Note: X: “H” or “L”
DQ1 to DQ8
Not Selected
Read
Read
High Z
Write
Write
Not Write, High Z
High Z
High Z
DQ9 to DQ16
Not Selected
Read
High Z
Read
Write
Not Write, High Z
Write
High Z
High Z
VDD Current
ISB1, ISB2
IDD
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
Input Voltage
Output Voltage
Allowable power dissipation
Storage temperature
VDD
VIN
VOUT
PD
TSTG
-0.5 to +4.6
-0.5 to VDD+0.5
(4.6V max.)
-0.5 to VDD+0.5
(4.6V max.)
0.7
-55 to 150
V
V
V
W
oC
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.06 6/2000
3/15
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.










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