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LM555 PDF даташит

Спецификация LM555 изготовлена ​​​​«Harris Corporation» и имеет функцию, называемую «Timers for Timing Delays and Oscillator Application in Commercial».

Детали детали

Номер произв LM555
Описание Timers for Timing Delays and Oscillator Application in Commercial
Производители Harris Corporation
логотип Harris Corporation логотип 

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LM555 Даташит, Описание, Даташиты
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SEMICONDUCTOR
May 1997
CA555, CA555C,
LM555, LM555C, NE555
Timers for Timing Delays and Oscillator Application
in Commercial, Industrial and Military Equipment
Features
Description
• Accurate Timing From Microseconds Through Hours
• Astable and Monostable Operation
• Adjustable Duty Cycle
• Output Capable of Sourcing or Sinking up to 200mA
• Output Capable of Driving TTL Devices
• Normally ON and OFF Outputs
• High Temperature Stability . . . . . . . . . . . . . . 0.005%/oC
• Directly Interchangeable with SE555, NE555, MC1555,
and MC1455
The CA555 and CA555C are highly stable timers for use in
precision timing and oscillator applications. As timers, these
monolithic integrated circuits are capable of producing accu-
rate time delays for periods ranging from microseconds
through hours. These devices are also useful for astable
oscillator operation and can maintain an accurately con-
trolled free running frequency and duty cycle with only two
external resistors and one capacitor.
Applications
• Precision Timing
• Sequential Timing
• Time Delay Generation
• Pulse Generation
• Pulse Detector
• Pulse Width and Position
The circuits of the CA555 and CA555C may be triggered by
the falling edge of the waveform signal, and the output of
these circuits can source or sink up to a 200mA current or
drive TTL circuits.
Modulation
Ordering Information
These types are direct replacements for industry types in
packages with similar terminal arrangements e.g. SE555
PART NUMBER
(BRAND)
CA0555E
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 8 Ld PDIP
PKG.
NO.
E8.3
and NE555, MC1555 and MC1455, respectively. The CA555
type circuits are intended for applications requiring premium
electrical performance. The CA555C type circuits are
CA0555M (555)
CA0555M96 (555)
-55 to 125 8 Ld SOIC
-55 to 125 8 Ld SOIC
M8.15 intended for applications requiring less stringent electrical
M8.15 characteristics.
CA0555T
-55 to 125 8 Pin Metal Can T8.C
CA0555CE
CA0555CM (555C)
0 to 70
0 to 70
8 Ld PDIP
8 Ld SOIC
E8.3
DaMt8a.1S5heet4U.com
CA0555CM96 (555C)
0 to 70 8 Ld SOIC
M8.15
CA0555CT
0 to 70 8 Pin Metal Can T8.C
LM555N
-55 to 125 8 Ld PDIP
E8.3
LM555CN
0 to 70 8 Ld PDIP
E8.3
NE555N
0 to 70 8 Ld PDIP
E8.3
NOTE: Denotes Tape and Reel
DataShee
Pinouts
CA555, CA555C (PDIP, SOIC)
LM555, LM555C, NE555 (PDIP)
TOP VIEW
GND 1
8 V+
TRIGGER 2
7 DISCHARGE
OUTPUT 3
6 THRESHOLD
RESET 4
5 CONTROL
VOLTAGE
CA555, CA555C (METAL CAN)
TOP VIEW
GND 1
V+
8
TAB
7 DISCHARGE
Functional Block Diagram
V+ TRIGGER
CONTROL
8 VOLTAGE 5 2
6
THRESHOLD
COMPAR
4
TRIGGER
COMPAR
FLIP-FLOP
3
OUTPUT
7
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TRIGGER 2
6 THRESHOLD
OUTPUT 3
5 CONTROL
4 VOLTAGE
RESET
1
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997
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LM555 Даташит, Описание, Даташиты
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CA555, CA555C, LM555, LM555C, NE555
Absolute Maximum Ratings
DC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V
Operating Conditions
Temperature Range
CA555, LM555 . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CA555C, LM555C, NE555 . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
Metal Can Package . . . . . . . . . . . . . . . 170
85
PDIP Package . . . . . . . . . . . . . . . . . . . 100
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
160
N/A
Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications TA = 25oC, V+ = 5V to 15V Unless Otherwise Specified
CA555, LM555 CA555C, LM555C, NE555
PARAMETER
SYMBOL TEST CONDITIONS
MIN TYP MAX MIN TYP MAX UNITS
DC Supply Voltage
DC Supply Current (Low State),
(Note 2)
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Threshold Voltage
Trigger Voltage
Trigger Current
V+ 4.5 - 18
I+ V+ = 5V, RL =
V+ = 15V, RL =
VTH
V+ = 5V
- 35
- 10
- (2/3)V+
1.45 1.67
12
-
1.9
V+ = 15V
4.8 5 5.2
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- 0.5 -
4.5 - 16
- 36
- 10 15
- (2/3)V+ -
- 1.67 -
-5-
- 0.5 -
V
mA
mA
V
V
V
µA
Threshold Current (Note 3)
Reset Voltage
ITH
- 0.1 0.25 -
0.4 0.7 1.0 0.4
0.1 0.25
0.7 1.0
µA
V
Reset Current
- 0.1 -
- 0.1 - mA
Control Voltage Level
V+ = 5V
2.9 3.33 3.8 2.6 3.33
4
V
V+ = 15V
9.6 10 10.4 9
10 11
V
Output Voltage
Low State
Output Voltage
High State
Timing Error (Monostable)
Frequency Drift with Temperature
Drift with Supply Voltage
VOL
VOH
V+ = 5V, ISINK = 5mA
-
ISINK = 8mA
-
V+ = 15V, ISINK = 10mA
-
ISINK = 50mA
-
ISINK = 100mA
-
ISINK = 200mA
-
V+ = 5V, ISOURCE = 100mA 3.0
V+ = 15V, ISOURCE = 100mA 13.0
ISOURCE = 200mA
-
R1, R2 = 1kto 100k,
C = 0.1µF
Tested at V+ = 5V, V+ = 15V
-
-
-
-
0.1
0.1
0.4
2.0
2.5
3.3
13.3
12.5
0.5
30
0.05
--
0.25 -
0.15 -
0.5 -
2.2 -
--
- 2.75
- 12.75
--
2-
100 -
0.2 -
0.25
-
0.1
0.4
2.0
2.5
3.3
13.3
12.5
1
50
0.1
0.35 V
-V
0.25 V
0.75 V
2.5 V
-V
-V
-V
-V
-%
- ppm/oC
- %/V
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LM555 Даташит, Описание, Даташиты
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CA555, CA555C, LM555, LM555C, NE555
Electrical Specifications TA = 25oC, V+ = 5V to 15V Unless Otherwise Specified (Continued)
CA555, LM555 CA555C, LM555C, NE555
PARAMETER
SYMBOL TEST CONDITIONS
MIN TYP MAX MIN TYP MAX UNITS
Output Rise Time
tR
- 100 -
- 100 -
ns
Output Fall Time
tF
- 100 -
- 100 -
ns
NOTES:
2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value.
3. The threshold current will determine the sum of the values of R1 and R2 to be used in Figure 4 (astable operation); the maximum total
R1 + R2 = 20M.
Schematic Diagram
V+
THRESHOLD
COMPARATOR
8
4.7K 830
4.7K
D1 D2
Q3 Q4
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THRESHOLD
6
Q1 Q7
Q2 Q5
CONTROL
VOLTAGE
5
2
TRIGGER
4
RESET
7
DISCHARGE
1
V-
10K
RESET
Q8
Q6
DISCHARGE
NOTE: Resistance values are in ohms.
TRIGGER
COMPARATOR
FLIP-FLOP
OUTPUT
1K 5K
6.8K
Q10 Q16
Q19
Q20
OUTPUT
3.9K
3
7K
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4.7K
5K
Q11 Q12
Q9 Q13
5K
100K
Q15
Q14
D3 D4
Q18
Q17
220
4.7K
Q21
DataShee
100
Typical Applications
Reset Timer (Monostable Operation)
Figure 1 shows the CA555 connected as a reset timer. In this
mode of operation capacitor CT is initially held discharged by
a transistor on the integrated circuit. Upon closing the “start”
switch, or applying a negative trigger pulse to terminal 2, the
integral timer flip-flop is “set” and releases the short circuit
across CT which drives the output voltage “high” (relay ener-
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gized). The action allows the voltage across the capacitor to
increase exponentially with the constant t = R1CT. When the
voltage across the capacitor equals 2/3 V+, the comparator
resets the flip-flop which in turn discharges the capacitor rap-
idly and drives the output to its low state.
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