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PDF IN74LV574 Data sheet ( Hoja de datos )
| Número de pieza | IN74LV574 | |
| Descripción | Octal D-Type Flip-Flop | |
| Fabricantes | IK Semiconductor | |
| Logotipo |  |
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TECHNICAL DATA
IN74LV574
Octal D-type flip-flop;
positive edge-trigger (3-State)
The 74LV574 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT574.
The 74LV574 is an octal D-type flip–flop featuring separate D-type
inputs for each flip-flop and non-inverting 3-state outputs for oriented
applications. A clock (CP) and an output enable (OE) input are common to
all flip-flops. The eight flip-flops will store the state of their individual D-
inputs that meet the set-up and hold times requirements on the LOW-to-
HIGH CP transition. When OE is LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs go to the high
impedance OFF-state. Operation of the OE input does not affect the state of
the flip-flops.
• Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL ICS
• Supply voltage range: 1.0 to 5.5 V
• Low input current: 1.0 µА; 0.1 µА at Т = 25 °С
• High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC DIP
20
1
20
1
DW SUFFIX
SO
ORDERING INFORMATION
IN74LV574N
Plastic DIP
IN74LV574DW
SOIC
TA = -40° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 20=VCC
www.datasheet4uP.IcNo10m= GND
FUNCTION TABLE
Output
Enable
L
L
L
Inputs
Clock
L,H,
D
H
L
X
HX
H= high level
L = low level
X = don’t care
Z = high impedance
X
Output
Q
H
L
no
change
Z
1
1 page  
IN74LV574
TIMING REQUIREMENTS CL=50 pF, tr=tf=2.5 ns)
Symbol
Parameter
Test
conditions
tw Pulse Width, Clock (high) VI = 0 V or V1
Figures 1,3
tsu Setup Time, Data to Clock VI = 0 V or V1
Figures 1,5
th Hold Time, Clock to Data VI = 0 V or V1
Figures 1,5
fc Clock Frequency
VI = 0 V or V1
Figures 1,3
VCC Guaranteed Limit
V -40°C to 25°C 85°C
125°C Unit
min max min max min max
1.2 120 -
2.0 29 - 34 - 41 -
2.7 21 - 25 - 30 -
3.0 17 - 20 - 24 -
4.5 15 -
ns
1.2 40 -
ns
2.0 19 - 22 - 26 -
2.7 14 - 16 - 19 -
3.0 11 - 13 - 15 -
4.5 9
-
1.2 5 - 5 - 5 - ns
2.0 5 - 5 - 5 -
2.7 5 - 5 - 5 -
3.0 5 - 5 - 5 -
1.2 -
2
MHz
2.0 - 17 - 15 - 12
2.7 - 21 - 19 - 16
3.0 - 27 - 24 - 20
4.5 - 31
VOL and VOH are the typical output voltage drop that occur with the output load.
Figure 3. Switching Waveforms
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet IN74LV574.PDF ] | |
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