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PDF IN74HC573A Data sheet ( Hoja de datos )
| Número de pieza | IN74HC573A | |
| Descripción | Octal Transparent Latch | |
| Fabricantes | IK Semiconductor | |
| Logotipo |  |
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TECHNICAL DATA
IN74HC573A
Octal 3-State Noninverting
Transparent Latch
High-Performance Silicon-Gate CMOS
The IN74HC573A is identical in pinout to the LS/ALS573. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when LE is high. When LE goes low, data meeting the
setup and hold time becomes latched.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC DIP
20
1
20
1
DW SUFFIX
SOIC
ORDERING INFORMATION
IN74HC573AN
Plastic DIP
IN74HC573ADW SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
DATA
INPUTS
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
NON INVERTING
OUTPUTS
PIN ASSIGNMENT
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20 V CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
LE 11
OE 1
PIN 20=VCC
PIN 10 = GND
www.datasheet4u.com
FUNCTION TABLE
Inputs
Output
OE LE
D
Q
L HH
H
L HL
L
L L X no change
H XX
Z
H= high level
L = low level
X = don’t care
Z = high impedance
1
1 page  
IN74HC573A
D
tPLH
tr
90%
50%
10%
Q 50% 90%
10%
tTLH
tf
t PHL
VCC
0В
tTHL
LE
Q
50%
tw
tPLH
50%
VCC
0В
t PHL
Figure 1. Switching Waveforms
OE 50%
t PZL
Q
tPZH
Q
50%
50%
t PLZ
tPHZ
10%
90%
VCC
0В
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
Figure 3. Switching Waveforms
Figure 2. Switching Waveforms
D 50%
t su th
LE 50%
Figure 4. Switching Waveforms
VCC
0В
VCC
0В
* Includes all probe and jig capacitance
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CL*
* Includes all probe and jig capacitance
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
1k
CL*
Connect to VCC when
testing tPLZ and tPZL
Connect to GND when
testing tPHZ and tPZH
Figure 5. Test Circuit
Figure 6. Test Circuit
EXPANDED LOGIC DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
DDDDDDDD
Q
LE
Q
LE
Q
LE
Q
LE
Q
LE
Q
LE
Q
LE
Q
LE
LE
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IN74HC573A.PDF ] | |
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