MN6152U PDF даташит
Спецификация MN6152U изготовлена «Panasonic Semiconductor» и имеет функцию, называемую «PLL LSI with Built-In Prescaler». |
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Детали детали
Номер произв | MN6152U |
Описание | PLL LSI with Built-In Prescaler |
Производители | Panasonic Semiconductor |
логотип |
8 Pages
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For Communications Equipment
MN6152U
PLL LSI with Built-In Prescaler
Overview
The MN6152U is a CMOS LSI for a phase-locked loop
(PLL) frequency synthesizer with serial data input.
It consists of a two-coefficient prescaler, variable
frequency divider, phase comparator, and charge pump.
It offers high-speed operation on a low power supply
voltage (1.8 to 2.5 V) and low power consumption (5 mW
for VDD=2.0 V, FIN=100 MHz).
Other features include intermittent operation by the
power save (PS) control signal and high-speed pull-in that
rapidly corrects the phase differences occurring at the start
of operation.
Features
Low power supply voltage: VDD=1.8 to 2.5V
Low power consumption: 5mW (VDD=2.0V,
FIN=100MHz)
High-speed operation:
FIN=175MHz
Frequency dividing ratios in reference frequency
dividing stage: 5 to 131,071
Frequency dividing ratios in comparator stage: 272 to
262,143
Lock detector output pin
Two types of phase comparator output
- Internal charge pump output
- Output for external charge pump
Output monitor pins for both comparator and refer-
ence frequency dividing stages
Pin Assignment
XIN
XOUT
FV
VDD
DOP
VSS
LD
FIN
1
2
3
4
5
6
7
8
16 OR
15 OV
14 LC
13 FR
12 PS
11 LE
10 DATA
9 CLK
(TOP VIEW)
SSOP016-P-0225
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MN6152U
Block Diagram
For Communications Equipment
Phase comparator
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For Communications Equipment
MN6152U
Pin Descriptions
Pin No. Symbol
1 XIN
2 XOUT
3 FV
4 VDD
5 DOP
6 VSS
7 LD
8 FIN
9 CLK
10 DATA
11 LE
12 PS
13 FR
14 LC
15 OV
16 OR
Function Description
Crystal oscillator connection pins:
XIN =Oscillator circuit input pin;
XOUT=Oscillator circuit output pin.
Frequency divider output signal in comparator stage.
Phase comparator input monitor.
Power supply
Low-pass filter connection pin. Use a passive filter.
Ground
Phase comparator output pin:
"H" level for locked; "L"level for unlocked.
Frequency divider input pin in comparating stage.
Shift register clock input pin.
The chip latches data at the rising edge of the CLK signal.
Shift register data input pin.
The final two bits in the data select the write latch:
"11" for R-latch; "01" for N-latch.
Load enable signal input pin.
This is the latch-write-enable signal. It is at "H" level for write.
Power save control signal input pin.
"H" level input starts the frequency divider and places the chip in operational mode.
"L" level input places the chip in standby mode, which saves power.
The chip switches the internal charge pump output to the H-z state and the loop
is opened.
Reference frequency divider output signal.
Phase comparator input monitor.
Charge pump control signal output pin.
When frequency divider operation is stopped, this pin is at "L" level, the
internal charge pump output is in the high-impedance state, and the loop is opened.
Phase comparator output pin for external charge pump.
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Номер в каталоге | Описание | Производители |
MN6152U | PLL LSI with Built-In Prescaler | Panasonic Semiconductor |
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DataSheet26.com | 2020 | Контакты | Поиск |