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PDF PSD4135F1V-C-90J Data sheet ( Hoja de datos )
| Número de pieza | PSD4135F1V-C-90J | |
| Descripción | Flash In-System-Programmable Peripherals for 16-Bit MCUs | |
| Fabricantes | ST Microelectronics | |
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PSD4135G2
Flash In-System-Programmable Peripherals
for 16-Bit MCUs
PRELIMINARY DATA
FEATURES SUMMARY
s 5 V±10% Single Supply Voltage:
s Up to 4 Mbit of Primary Flash Memory (8
uniform sectors)
s 256Kbit Secondary Flash Memory (4 uniform
sectors)
s Up to 64 Kbit SRAM
s Over 3,000 Gates of PLD: DPLD and CPLD
s 52 Reconfigurable I/O ports
s Enhanced JTAG Serial Port
s Programmable power management
s High Endurance:
– 100,000 Erase/Write Cycles of Flash Memory
– 1,000 Erase/Write Cycles of PLD
Figure 1. Packages
TQFP80 (U)
January 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/3
1 page  
PSD4000 Series
1.0
Introduction
(Cont.)
2
Preliminary Information
The PSD4135G2 device offers two methods to program PSD Flash memory while the PSD
is soldered to a circuit board.
t In-System Programming (ISP) via JTAG
An IEEE 1149.1 compliant JTAG-ISP interface is included on the PSD enabling the
entire device (both flash memories, the PLD, and all configuration) to be rapidly
programmed while soldered to the circuit board. This requires no MCU participation,
which means the PSD can be programmed anytime, even while completely blank.
The innovative JTAG interface to flash memories is an industry first, solving key
problems faced by designers and manufacturing houses, such as:
• First time programming – How do I get firmware into the flash the very first time?
JTAG is the answer, program the PSD while blank with no MCU involvement.
• Inventory build-up of pre-programmed devices – How do I maintain an accurate
count of pre-programmed flash memory and PLD devices based on customer
demand? How many and what version? JTAG is the answer, build your hardware
with blank PSDs soldered directly to the board and then custom program just before
they are shipped to customer. No more labels on chips and no more wasted
inventory.
• Expensive sockets – How do I eliminate the need for expensive and unreliable
sockets? JTAG is the answer. Solder the PSD directly to the circuit board. Program
first time and subsequent times with JTAG. No need to handle devices and bend the
fragile leads.
t In-Application re-Programming (IAP)
Two independent flash memory arrays are included so the MCU can execute code
from one memory while erasing and programming the other. Robust product firmware
updates in the field are possible over any communication channel (CAN, Ethernet,
UART, J1850, etc) using this unique architecture. Designers are relieved of these
problems:
• Simultaneous read and write to flash memory – How can the MCU program the
same memory from which it is executing code? It cannot. The PSD allows the MCU
to operate the two flash memories concurrently, reading code from one while erasing
and programming the other during IAP.
• Complex memory mapping – How can I map these two memories efficiently?
A Programmable Decode PLD is embedded in the PSD. The concurrent PSD
memories can be mapped anywhere in MCU address space, segment by segment
with extremely high address resolution. As an option, the secondary flash memory
can be swapped out of the system memory map when IAP is complete. A built-in
page register breaks the MCU address limit.
• Separate program and data space – How can I write to flash memory while it
resides in “program” space during field firmware updates, my 80C51XA won’t allow it
The flash PSD provides means to “reclassify” flash memory as “data” space during
IAP, then back to “program” space when complete.
PSDsoft – ST’s software development tool – guides you through the design process step-
by-step making it possible to complete an embedded MCU design
capable of ISP/IAP in just hours. Select your MCU and PSDsoft will take you through
the remainder of the design with point and click entry, covering...PSD selection, pin
definitions, programmable logic inputs and outputs, MCU memory map definition, ANSI C
code generation for your MCU, and merging your MCU firmware with the PSD design.
When complete, two different device programmers are supported directly from PSDsoft –
FlashLINK (JTAG) and PSDpro.
The PSD4135G2 is available in an 80-pin TQFP package.
Please refer to the revision block at the end of this
document for updated information.
5 Page 
PSD4000 Series
6.0
Table 5.
PSD4000
Pin
Descriptions
Preliminary Information
The following table describes the pin names and pin functions of the PSD4000. Pins that
have multiple names and/or functions are defined using PSDsoft.
Pin Name
ADIO0-7
ADIO8-15
CNTL0
CNTL1
CNTL2
Pin*
(TQFP
Pkg.) Type
3-7 I/O
10-12
13-20 I/O
59 I
60 I
40 I
Description
This is the lower Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where the
data is multiplexed with the lower address bits, connect
AD[0:7] to this port.
2. If your MCU does not have a multiplexed address/data bus,
connect A[0:7] to this port.
3. If you are using an 80C51XA in burst mode, connect
A4/D0 through A11/D7 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional blocks
was selected. The addresses on this port are passed to the
PLDs.
This is the upper Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where the
data is multiplexed with the upper address bits, connect
AD[8:15] to this port.
2. If your MCU does not have a multiplexed address/data bus,
connect A[8:15] to this port.
3. If you are using an 80C51XA in burst mode, connect
A12/D8 through A19/D15 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional
blocks was selected. The addresses on this port are passed
to the PLDs.
The following control signals can be connected to this port,
based on your MCU:
1. WR — active-low write input.
2. R_W — active-high read/active low write input.
3. WRL — Write to low byte, active low
This pin is connected to the PLDs. Therefore, these signals can
be used in decode and other logic equations.
The following control signals can be connected to this port,
based on your MCU:
1. RD — active-low read input.
2. E — E clock input.
3. DS — active-low data strobe input.
4. LDS — Strobe for low data byte, active low.
This pin is connected to the PLDs. Therefore, these signals can
be used in decode and other logic equations.
Read or other Control input pin with multiple configurations.
Depending on the MCU interface selected, this pin can be:
1. PSEN — Program Select enable, active low in code fetch
bus cycle (80C51XA mode)
2. BHE — High byte enable.
3. UDS — Strobe for high data byte, 16-bit data bus mode,
active low.
4. SIZ0 — Byte enable input.
5. LSTRB — Low strobe input.
This pin is also connected to PLD as input.
8
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