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Número de pieza | 87C528 | |
Descripción | 80C51 8-bit microcontrollers 16K/32K/ 512 OTP/ I2C/ watchdog timer | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 87C528 (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
No Preview Available ! INTEGRATED CIRCUITS
87C524/87C528
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I2C, watchdog timer
Product specification
Replaces data sheets 87C524 of 1998 May 01 and 87C528 of 1998 May 01
IC28 Data Handbook
1999 Jul 23
Philips
Semiconductors
1 page Philips Semiconductors
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I2C, watchdog timer
PLASTIC QUAD FLAT PACK
PIN FUNCTIONS
44 34
1
QFP
11
33
23
12
Pin Function
1 P1.5
2 P1.6/SCL
3 P1.7/SDA
4 RST
5 P3.0/RxD
6 NC*
7 P3.1/TxD
8 P3.2/INT0
9 P3.3/INT1
10 P3.4/T0
11 P3.5/T1
12 P3.6/WR
13 P3.7/RD
14 XTAL2
15 XTAL1
16 VSS
17 NC*
18 P2.0/A8
19 P2.1/A9
20 P2.2/A10
21 P2.3/A11
22 P2.4/A12
* NO INTERNAL CONNECTIONS
22
Pin Function
23 P2.5/A13
24 P2.6/A14
25 P2.7/A15
26 PSEN
27 ALE
28 NC*
29 EA
30 P0.7/AD7
31 P0.6/AD6
32 P0.5/AD5
33 P0.4/AD4
34 P0.3/AD3
35 P0.2/AD2
36 P0.1/AD1
37 P0.0/AD0
38 VDD
39 NC*
40 P1.0/T2
41 P1.1/T2EX
42 P1.2
43 P1.3
44 P1.4
SU00164
Product specification
87C524/87C528
1999 Jul 23
5
5 Page Philips Semiconductors
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I2C, watchdog timer
Product specification
87C524/87C528
DC ELECTRICAL CHARACTERISTICS
Tamb = 0°C to +70°C (VDD = 5 V ±10%), –40°C to +85°C (VDD = 5 V ±10%), VSS=0 V
TEST
LIMITS
SYMBOL
PARAMETER
PART TYPE
CONDITIONS
MIN
MAX
UNIT
VIL
VIL1
VIL2
VIH
VIH1
VIH2
VOL
VOL1
VOL2
VOH
VOH1
IIL
Input low voltage,
except EA, P1.6/SCL, P1.7/SDA
Input low voltage to EA
Input low voltage to P1.6/SCL, P1.7/SDA5
Input high voltage,
except XTAL1, RST, P1.6/SCL, P1.7/SDA
Input high voltage, XTAL1, RST
Input high voltage, P1.6/SCL, P1.7/SDA5
Output low voltage, ports 1, 2, 3, except
P1.6/SCL, P1.7/SDA1
Output low voltage, port 0, ALE, PSEN1
Output low voltage, P1.6/SCL, P1.7/SDA
Output high voltage, ports 1, 2, 3
0°C to 70°C
–40°C to +85°C
0°C to 70°C
–40°C to +85°C
0°C to 70°C
–40°C to +85°C
0°C to 70°C
–40°C to +85°C
Output high voltage, Port 0 in external bus mode,
ALE, PSEN, RST
Logical 0 input current, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
0°C to 70°C
–40°C to +85°C
IOL = 1.6 mA1
IOL = 3.2 mA1
IOL = 3.0 mA1
IOH = –60 µA
IOH = –25 µA
IOH = –800 µA
IOH = –300 µA
VIN = 0.45 V
–0.5
–0.5
0
0
–0.5
0.2VCC–0.1
0.2VCC–0.15
0.2VCC–0.3
0.2VCC–0.35
0.3 V
0.2VCC+0.9
0.2VCC+1.0
0.7VCC
0.7VCC+0.1
3.0
VCC+0.5
VCC+0.5
VCC+0.5
VCC+0.5
6.0
0.45
V
V
V
V
V
V
V
V
V
V
V
2.4
0.75VCC
2.4
0.75VCC
0.45 V
0.4 V
V
V
V
V
–50 µA
–75 µA
ITL Logical 1-to-0 transition current, ports 1, 2, 3,
0°C to 70°C
See Note 3
except P1.6/SCL, P1.7/SDA
–40°C to +85°C
–650
–750
µA
µA
IIL1 Input leakage current, port 0
VIN = VIL or VIH
±10 µA
IIL2 Input leakage current, P1.6/SCL, P1.7/SDA
ICC Power supply current:
0 V<Vi<6.0 V
0 V<VCC<6.0 V
See Note 4
±10 µA
µA
Active mode @ 16 MHz
Idle mode @ 16 MHz
Power down mode
0oC to 70oC
–40oC to +85oC
0oC to 70oC
–40oC to +85oC
25 mA
35
5 mA
6
50 µA
RRST
Internal reset pull-down resistor
50 300 kΩ
CIO Pin Capacitance
10 pF
NOTES:
1. Capacitive loading on Port 0 and Port 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and ports 1 and 3. The
noise is due to external bus capacitance discharging into the port and port 2 pins when these pins make 1-to-0 transactions during bus
operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be
desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. Under steady state
(non-transient) conditions, IOL must be externally limited as follows: 10 mA per port pin, port 0 total (all bits) 26 mA, ports 1, 2, and total each
(all bits) 15 mA.
2. Capacitive loading on Ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specification when the
address bits are stabilizing.
3. Pins of ports 1, 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when VIN is approximately 2 V.
4. See Figures 10 through 13 for ICC test conditions.
5. The input threshold voltage of P1.6 and P1.7 (SIO1) meets the I2C specification, so an input voltage below 1.5 V will be recognized as a
logic 0 while an input voltage above 3.0 V will be recognized as a logic 1.
1999 Jul 23
11
11 Page |
Páginas | Total 26 Páginas | |
PDF Descargar | [ Datasheet 87C528.PDF ] |
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