|
|
PDF 82595TX Data sheet ( Hoja de datos )
| Número de pieza | 82595TX | |
| Descripción | ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER | |
| Fabricantes | Intel Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 82595TX (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
82595TX
ISA PCMCIA HIGH INTEGRATION
ETHERNET CONTROLLER
Y Optimal Integration for Lowest Cost
Solution
Glueless 8-Bit 16-Bit ISA PCMCIA 2 0
Bus Interface
Provides Fully 802 3 Compliant AUI
and TPE Serial Interface
Local DRAM Support up to
64 Kbytes
FLASH EPROM Boot Support up to
1 Mbyte for Diskless Workstations
Hardware and Software Portable
between Motherboard Adapter and
PCMCIA LAN Card Solution
Y High Performance Networking
Functions
Concurrent Processing Functionality
for Enhanced Performance
16-Bit 32-Bit IO Accesses to Local
DRAM with Zero Added Wait-States
Ring Buffer Structure for Continuous
Frame Reception and Transmit
Chaining
Automatic Retransmission on
Collision
Automatically Corrects TPE Polarity
Switching Problems
Y Low Power CHMOS IV Technology
Y Ease of Use
Integrated Plug N’ PlayTM Hardware
Functionality
EEPROM Interface to Support
Jumperless Designs
Software Structures Optimized to
Reduce Processing Steps
Automatically Maps into Unused PC
IO Locations to Help Eliminate LAN
Setup Problems
All Software Structures Contained in
One 16-Byte IO Space
JTAG Port for Reduced Board
Testing Times
Automatic or Manual Switching
between TPE and AUI Ports
Y Power Management
SL Compatible SMOUT Power Down
Input
Software Power Down Command for
Non-SL Systems
Y 144-Lead tQFP Package Provides
Smallest Available Form Factor
Y 100% Backwards Hardware Software
Compatible to 82595
Figure 1 82595TX Block Diagram
281630 – 1
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1996
October 1995
Order Number 281630-001
1 page  
82595TX
1 0 INTRODUCTION
1 1 82595TX Overview
The 82595TX is a highly integrated high perform-
ance LAN controller which provides a cost effective
LAN solution for ISA compatible Personal Computer
(PC) motherboards (both desktop and portable)
add-on ISA adapter boards and PCMCIA cards The
82595TX integrates all of the major functions of a
buffered LAN solution into one chip with the excep-
tion of the local buffer memory which is implement-
ed by adding one DRAM component to the LAN so-
lution The 82595TX’s new Concurrent Processing
feature significantly enhances throughput perform-
ance Both system bus and serial link activities occur
concurrently allowing the 82595TX to maximize net-
work bandwidth by minimizing delays associated
with transmit or receiving frames The 82595TX’s
bus interface is a glueless attachment to either an
ISA or PCMCIA version 2 0 bus Its serial interface
provides a Twisted Pair Ethernet (TPE) and an At-
tachment Unit Interface (AUI) connection By inte-
grating the majority of the LAN solution functions
into one cost effective component production cost
saving can be achieved as well as significantly de-
creasing the design time for a solution This level of
integration also allows an 82595TX solution to be
ported between different applications (PC mother-
boards adapters and PCMCIA IO cards) while
maintaining a compatible hardware and software
base This results in further savings in both hardware
and software development costs for manufacturers
expanding into different applications i e an ISA
adapter vendor producing PCMCIA IO cards etc
The 82595TX’s software interface is optimized to re-
duce the number of processing steps that are re-
quired to interface to the 82595TX solution The
82595TX’s initialization and control registers are di-
rectly addressable within one 16-byte IO address
block The 82595TX can automatically resolve any
conflicts to an IO block by moving its IO offset to an
unused location in the case that a conflict occurs
The 82595TX’s local memory is arranged in a simple
ring buffer structure for efficient transfer of transmit
and receive packets The local memory up to
64 Kbytes of DRAM resides as either a 16-bit or 32-
bit IO port in the host systems IO map programma-
ble through configuration The 82595TX provides di-
rect control over the local DRAM including refresh
The 82595TX performs a prefetch to the DRAM
memory allowing CPU IO cycles to this data with no
added wait-states The 82595TX also provides an
interface to up to 1 Mbyte of FLASH or EPROM
memory An interface to an EEPROM which holds
solution configuration values and can also contain
the Node ID allows for the implementation of a
‘‘jumperless’’ design In addition the 82595TX con-
tains full hardware support for the implementation of
the ISA Plug N’ Play specification Plug N’ Play elimi-
nates jumpers and complicated setup utilities by al-
lowing peripheral functions to be added to a PC au-
tomatically (such as adapter cards) without the need
to individually configure each parameter (e g Inter-
rupt IO Address etc) This allows for configuration
ease-of-use which results in minimal time associat-
ed with installation
The 82595TX’s packaging and power management
features are designed to consume minimal board
real estate and system power This is required for
applications such as portable PC motherboard de-
signs and PCMCIA cards which require a solution
with very low real estate and power consumption
The 82595TX package is a 144-lead tQFP (thin
Quad Flat Pack) Its dimensions are 20 mm by
20 mm and 1 7 mm in height (roughly the same area
as a US Nickel and the same height as a US Dime)
The 82595TX contains two power down modes an
SL compatible power down mode which utilizes the
SL SMOUT input and a POWER DOWN command
for non-SL systems
1 2 Enhancements to the 82595
The 82595TX is fully backwards compatible to the
82595 both in pinout and software However the
82595TX contains several advanced functions from
the 82595 which increase performance and ease of
use The following is a list of the major enhance-
ments to the 82595TX
Concurrent Processing Functionality
32-Bit Local Memory IO Port
Integrated Plug N’ Play support
Added EEPROM Interface for Plug N’ Play
Flash addressing up to 1 Mbyte (versus 256K for
82595)
For further information on these enhancements
and a description of all the differences between
the 82595 and 82595TX please consult the
82595TX User’s Manual available through your
local sales representative
1 3 Compliance to Industry Standards
The 82595TX has two interfaces the host system
interface which is an ISA or PCMCIA bus interface
and the serial or network interface Both interfaces
have been standardized by the IEEE
5
5 Page 
82595TX
2 4 Miscellaneous Control
Symbol
Pin
No
Type
Name and Function
DIRL
42 O DIRECTION LOW Controls the direction of the low byte data bus
transceiver The direction defaults to always point in from the ISA bus to
the 82595TX (DIRL e 1) This direction is turned around (82595TX out to
ISA bus DIRL e 0) only in the case of a read access to the 82595TX
based solution
DIRH
45 O DIRECTION HIGH Controls the direction of the high byte data bus
transceiver The direction defaults to always point in from the ISA bus to
the 82595TX (DIRH e 1) This direction is turned around (82595TX out to
ISA bus DIRH e 0) only in the case of a read access to the 82595TX
based solution This signal is active for 16-bit accesses only
SMOUT
11 I O This active LOW signal when asserted places the 82595TX into a Power
Down mode The 82595TX will remain in power down mode until SMOUT
is unasserted If this line is unconnected to SMOUT from the system bus
it can be used as an active low output which when a POWER DOWN
command is issued to the 82595TX can be used to power down other
external components (this output function is enabled by configuration)
PCMCIA ISA 22 I This pin when strapped low selects an ISA bus interface Strapped high
selects PCMCIA
J0 107 I JUMPER input for selecting between 7 ISA IO spaces (also selects
J1 106 I O whether the IO location should be read from the EEPROM) These pins
J2 105 I O should be connected to either VCC or GND The 82595TX reads the
Jumper block during its initialization sequence
J0
GND
VCC
GND
VCC
GND
VCC
GND
VCC
J1
GND
GND
VCC
VCC
GND
GND
VCC
VCC
J2
GND
GND
GND
GND
VCC
VCC
VCC
VCC
IO Address
Address Contained in EEPROM
2A0h
280h
340h
300h
360h
350h
330h
2 5 JTAG Control
Symbol
Pin
No
Type
TDO
97 O
TMS
98 I
TCK
99 I
TDI 100 I
Name and Function
JTAG TEST DATA OUT
JTAG TEST MODE SELECT
JTAG TEST CLOCK
JTAG TEST DATA IN
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 82595TX.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 82595TX | ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER | Intel Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |