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7LVC373APWDH PDF даташит

Спецификация 7LVC373APWDH изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State».

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Номер произв 7LVC373APWDH
Описание Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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7LVC373APWDH Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
74LVC373A
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs (3-State)
Product specification
1998 Jul 29
Philips
Semiconductors









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7LVC373APWDH Даташит, Описание, Даташиты
Philips Semiconductors
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs (3-State)
Product specification
74LVC373A
FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
Supply voltage range of 2.7V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
High impedance when VCC = 0V
DESCRIPTION
The 74LVC373A is a high-performance, low-power, low-voltage,
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC373A is an octal D-type transparent latch featuring
separate D-type inputs for each latch and 3-State outputs for
bus-oriented applications. A latch enable (LE) input and an output
enable (OE) input are common to all internal latches.
The ’373’ consists of eight D-type transparent latches with 3-State
true outputs. When LE is HIGH, data at the Dn inputs enters the
latches. In this condition, the latches are transparent, i.e. a latch
output will change each time its corresponding D-input changes.
When LE is LOW, the latches store the information that was present
at the D-inputs one setup time preceding the HIGH-to-LOW
transition of LE. When OE is LOW, the contents of the eight latches
are available at the outputs. When OE is HIGH, the outputs go to the
high impedance OFF-state. Operation of the OE input does not
affect the state of the latches.
The ’373’ is functionally identical to the ’573’, but the ’573’ has a
different pin arrangement.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
Propagation delay
Dn to Qn;
LE to Qn
CL = 50pF
VCC = 3.3V
CI Input capacitance
CPD Power dissipation capacitance per latch Notes 1 and 2
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in mW):
PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL x VCC2 x fo) = sum of outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES
20-Pin Plastic Shrink Small Outline (SO)
20-Pin Plastic Shrink Small Outline (SSOP) Type II
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
TEMPERATURE
OUTSIDE
RANGE
NORTH AMERICA
–40°C to +85°C 74LVC373A D
–40°C to +85°C 74LVC373A DB
–40°C to +85°C 74LVC373A PW
4.2
4.6
5.0
20
NORTH AMERICA
74LVC373A D
74LVC373A DB
7LVC373APW DH
ns
pF
pF
PKG. DWG. #
SOT163-1
SOT339-1
SOT360-1
1998 Jul 29
2 853-1860 19802









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7LVC373APWDH Даташит, Описание, Даташиты
Philips Semiconductors
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs (3-State)
Product specification
74LVC373A
PIN CONFIGURATION
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
SA00383
PIN DESCRIPTION
PIN NUMBER SYMBOL
FUNCTION
1
3, 4, 7, 8, 13,
14, 17, 18
OE
D0-D7
Output enable input (active-Low)
Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0-Q7 Data outputs
11 LE Latch enable input (active-High)
10 GND Ground (0V)
20 VCC Positive supply voltage
LOGIC SYMBOL
3 4 7 8 13 14 17 18
D0 D1 D2 D3 D4 D5 D6 D7
11 LE
1 OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2 5 6 9 12 15 16 19
SA00384
LOGIC SYMBOL (IEEE/IEC)
1 EN
11
C1
3 1D
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
SA00385
FUNCTIONAL DIAGRAM
3 D0
4 D1
7 D2
8 D3
13 D4
14 D5
17 D6
18 D7
11 LE
1 OE
LATCH
1 to 8
Q0 2
Q1 5
Q2 6
3-State
OUTPUTS
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19
SA00387
1998 Jul 29
3










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Номер в каталогеОписаниеПроизводители
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