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PDF LA76070 Data sheet ( Hoja de datos )

Número de pieza LA76070
Descripción NTSC Color Television IC
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LA76070 Hoja de datos, Descripción, Manual

Ordering number : ENN5844
Monolithic Linear IC
LA76070
NTSC Color Television IC
Overview
The LA76070 is an NTSC color television IC. In addition
to providing IIC bus control based rationalization of IC
control and the adjustment manufacturing process
associated with the TV tube itself, it also includes all
functions actually required in mass-produced television
sets. As such, it is an extremely practical bus control IC.
* The LA7840/41 or LA7845N/46N is recommended as the vertical output
IC for use with this product.
Functions
• I2C bus control, VIF, SIF, Y, C, and deflection
integrated on a single chip.
Package Dimensions
unit: mm
3128-DIP52S
[LA76070]
52
27
1 26
46.0
0.48 1.05 1.78 0.75
SANYO: DIP52S
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum power supply voltage
Maximum power supply current
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
V4 max
V26 max
I21 max
Pd max
Topr
Tstg
Ta 65°C*
Conditions
Note: *Provided on a printed circuit board: 83.2 × 86.0 × 1.6 mm, material: Bakelite
Rating
9.6
9.6
25
1.3
–10 to +65
–55 to +150
Unit
V
V
mA
W
°C
°C
Operating Conditions at Ta = 25°C
Parameter
Recommended power supply voltage
Recommended power supply current
Operating power supply voltage range
Operating power supply current range
Symbol
V4
V26
I21
V4 op
V26 op
121 op
Conditions
Rating
7.6
7.6
19
7.3 to 7.9
7.3 to 7.9
16 to 25
Units
V
V
mA
V
V
mA
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
70999 RM (OT) No. 5844-1/27

1 page




LA76070 pdf
LA76070 BUS: Initial Conditions
Initial test conditions
Register
T Enable
Video Mute
Sync Kill
AFC Gain
Horizontal Phase
IF AGC SW
AFT Defeat
RF AGC Delay
0 HEX
1 HEX
0 HEX
0 HEX
4 HEX
0 HEX
0 HEX
20 HEX
LA76070
Initial test conditions
Register
Video SW
PLL Tuning
Audio Mute
APC Det Adjust
V CD Mode
Vertical DC
Vertical Kill
Col Kill
Vertical Size
Red Bias
Green Bias
Blue Bias
Blanking Defeat
Red Drive
Blue Drive
Color Difference Mode Enable
Brightness Control
Contrast Test Enable
Contrast Control
Trap & Delay Enable SW
Auto Flesh
Black Stretch Defeat
Sharpness Control
Tint Test Enable
Tint Control
Color Test Enable
Color Control
Vertical Test
Video Level
FM Level
BNI Enable
Audio SW
Volume Control
(continued)
0 HEX
40 HEX
1 HEX
20 HEX
0 HEX
20 HEX
0 HEX
0 HEX
20 HEX
00 HEX
00 HEX
00 HEX
0 HEX
7F HEX
7F HEX
0 HEX
40 HEX
0 HEX
40 HEX
0 HEX
0 HEX
0 HEX
10 HEX
0 HEX
40 HEX
0 HEX
40 HEX
0 HEX
4 HEX
10 HEX
0 HEX
0 HEX
00 HEX
No. 5844-5/27

5 Page





LA76070 arduino
LA76070
Parameter
Symbol
Measurement
point
Input signal
Measurement procedure
Bus conditions
[VIF Block]
AFT output voltage with no signal VAFTn
Video output voltage with no signal
VOn
13
45
APC pull-in range (U), (L)
fPU, fPL 45
Maximum RF AGC voltage
Minimum RF AGC voltage
RF AGC Delay Pt
(@DAC = 0)
RF AGC Delay Pt
(@DAC = 63)
VRFH
VRFL
RFAGC0
6
6
6
6RFAGC63
Maximum AFT output voltage
VAFTH 13
Minimum AFT output voltage
VAFTL 13
AFT detection sensitivity
VAFTS 13
Video output amplitude
Synchronization signal tip level
VO
VOtip
45
45
Input sensitivity
Vi 45
Video-to-sync ratio (@ 100 dBµ)
V/S
45
Differential gain
Differential phase
Video signal-to-noise ratio
DG 45
DP 45
S/N 45
920 kHz beat level
I920 45
Measure the pin 13 DC voltage when
No signal IF.AGC. DEF is "1"
After performing the adjustments
described in section 4
Measure the pin 45 DC voltage when
No signal IF.AGC. DEF is "1"
After performing the adjustments
described in section 4
SG4
93 dBµ
Connect an oscilloscope to pin 45 and modify
the SG4 signal to be a frequency above 45.75
MHz so that the PLL circuit becomes unlocked.
(Beating will occur in this state.) Gradually
lower the SG4 frequency and measure the
frequency at which the PLL circuit locks.
Similarly, modify the frequency to a value
below 45.75 MHz so that the PLL circuit
becomes unlocked. Gradually raise the SG4
frequency and measure the frequency at which
the PLL circuit locks.
After performing the adjustments
described in section 4
SG1 Set the RF AGC DAC to 0 and measure the pin After performing the adjustments
91 dBµ 6 DC voltage
described in section 4
SG1 Set the RF AGC DAC to 63 and measure the
91 dBµ pin 6 DC voltage
After performing the adjustments
described in section 4
SG1
Set the RF AGC DAC to 0 and determine the
input level such that the pin 6 DC voltage
becomes 3.8 V ±0.5 V
After performing the adjustments
described in section 4
SG1
Set the RF AGC DAC to 63 and determine the
input level such that the pin 4 DC voltage
becomes 3.8 V ±0.5 V
After performing the adjustments
described in section 4
SG4
93 dBµ
Set the SG4 signal frequency to 44.75 MHz
and input that signal. Measure the pin 13 DC
voltage at that time.
After performing the adjustments
described in section 4
SG4
93 dBµz
Set the SG4 signal frequency to 46.75 MHz
and input that signal. Measure the pin 13 DC
voltage at that time.
After performing the adjustments
described in section 4
SG4
93 dBµz
Modify the SG4 frequency to determine the
frequency deviation (f) such that the pin
13 DC voltage changes from 2.5 V to 5.0 V.
VAFTS = 2500/f [mV/kHz]
After performing the adjustments
described in section 4
SG7 Observe pin 45 with an oscilloscope and
93 dBµ measure the p-p value of the waveform
After performing the adjustments
described in section 4
SG1
93 dBµ Measure the pin 45 DC voltage
After performing the adjustments
described in section 4
SG7
Observe pin 45 with an oscilloscope and measure
the peak-to-peak value of the waveform. Next,
gradually lower the input level to determine the input
level such that the output becomes –3 dB below the
video signal amplitude VO.
After performing the adjustments
described in section 4
SG7
100 dBµ
Observe pin 45 with an oscilloscope and
determine the value of the Vy/Vs ratio by
measuring the peak-to-peak value of the sync
After performing the adjustments
described in section 4
waveform (Vs) and the peak-to-peak value of the
luminance signal (Vy).
SG5
93 dBµ Measure pin 45 with a vectorscope
After performing the adjustments
described in section 4
SG5
93 dBµ Measure pin 45 with a vectorscope
After performing the adjustments
described in section 4
SG1
93 dBµ
Pass the noise voltage that occurs on pin
45 through a 10 kHz to 4 MHz bandpass filter,
measure that voltage (Vsn) with an rms
voltmeter. Use that value to calculate 20 × log
(1.43/Vsn).
After performing the adjustments
described in section 4
SG1
SG2
SG3
Input SG1 at 93 dBµ and measure the pin
12 DC voltage (V12).Mix three signals: SG1 at
87 dBµ, SG2 at 82 dBµ, and SG3 at 63 dBµ,
and input that signal to VIF IN. Now, apply the
V12 voltage to pin 12 using an external power
supply. Measure the difference between the
3.58 MHz component and the 920 kHz
component with a spectrum analyzer.
After performing the adjustments
described in section 4
No. 5844-11/27

11 Page







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