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X24325PI-2.7 PDF даташит

Спецификация X24325PI-2.7 изготовлена ​​​​«Xicor» и имеет функцию, называемую «Advanced 2-Wire Serial E 2 PROM with Block Lock TM Protection».

Детали детали

Номер произв X24325PI-2.7
Описание Advanced 2-Wire Serial E 2 PROM with Block Lock TM Protection
Производители Xicor
логотип Xicor логотип 

17 Pages
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X24325PI-2.7 Даташит, Описание, Даташиты
Preliminary Information
32K
X24325
4096 x 8 Bit
Advanced 2-Wire Serial E2PROM with Block LockTM Protection
FEATURES
2.7V to 5.5V Power Supply
Low Power CMOS
—Active Read Current Less Than 1mA
—Active Write Current Less Than 3mA
—Standby Current Less Than 1µA
Internally Organized 4096 x 8
New Programmable Block Lock Protection
—Software Write Protection
—Programmable hardware Write Protect
Block Lock (0, 1/4, 1/2, or all of the E2PROM
array)
2 Wire Serial Interface
Bidirectional Data Transfer Protocol
32 Byte Page Write Mode
—Minimizes Total Write Time Per Byte
Self Timed Write Cycle
—Typical Write Cycle Time of 5ms
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
Available Packages
—8-Lead PDIP
—8-Lead SOIC (JEDEC)
—14-Lead TSSOP
FUNCTIONAL DIAGRAM
WP
VCC
VSS
SDA
START
STOP
LOGIC
DESCRIPTION
The X24325 is a CMOS 32,768 bit serial E2PROM,
internally organized 4096 x 8. The X24325 features a
serial interface and software protocol allowing opera-
tion on a simple two wire bus.
Three device select inputs (S0, S1, S2) allow up to
eight devices to share a common two wire bus.
A Write Protect Register at the highest address loca-
tion, FFFh, provides three new write protection
features: Software Write Protect, Block Write Protect,
and Hardware Write Protect. The Software Write
Protect feature prevents any nonvolatile writes to the
X24325 until the WEL bit in the write protect register is
set. The Block Write Protection feature allows the user
to individually write protect four blocks of the array by
programming two bits in the write protect register. The
Programmable Hardware Write Protect feature allows
the user to install the X24325 with WP tied to VCC,
program the entire memory array in place, and then
enable the hardware write protection by programming
a WPEN bit in the write protect register. After this,
selected blocks of the array, including the write protect
register itself, are permanently write protected.
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
START CYCLE
H.V. GENERATION
TIMING &
CONTROL
WRITE PROTECT
REGISTER AND
LOGIC
SCL
S0
S1
S2
SLAVE ADDRESS
REGISTER
+COMPARATOR
CONTROL
LOGIC
LOAD
INC
WORD
ADDRESS
COUNTER
R/W
DOUT
ACK
PIN
XDEC
E2PROM
128 X 256
YDEC
8
CK DATA REGISTER DOUT
6552 ILL F01.1
©Xicor, 1995, 1996 Patents Pending
6552-2.4 5/13/96 T1/C10/D0 NS
Characteristics subject to change without notice
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X24325PI-2.7 Даташит, Описание, Даташиты
X24325
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of
the device.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs.
An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the Pull-
Up Resistor selection graph at the end of this data
sheet.
Device Select (S0, S1, S2)
The device select inputs (S0, S1, S2) are used to set
the first three bits of the 8-bit slave address. This
allows up to eight X24325’s to share a common bus.
These inputs can be static or actively driven. If used
statically they must be tied to VSS or VCC as appro-
priate. If actively driven, they must be driven with
CMOS levels (driven to VCC or VSS).
Write Protect (WP)
The write protect input controls the hardware write
protect feature. When held LOW, hardware write
protection is disabled and the X24325 can be written
normally. When this input is held HIGH, and the WPEN
bit in the write protect register is set HIGH, write
protection is enabled, and nonvolatile writes are
disabled to the selected blocks as well as the write
protect register itself.
PIN NAMES
Symbol
S0, S1, S2
SDA
SCL
WP
VSS
VCC
NC
Description
Device Select Inputs
Serial Data
Serial Clock
Write Protect
Ground
Supply Voltage
No Connect
6552 FRM T01.1
PIN CONFIGURATIONS
8-LEAD DIP & SOIC
S0
S1
S2
VSS
18
27
X24325
36
45
VCC
WP
SCL
SDA
S0
S1
NC
NC
NC
S2
VSS
14-LEAD TSSOP
1 14
2 13
3 12
4 X24325 11
5 10
69
78
VCC
WP
NC
NC
NC
SCL
SDA
6552 ILL F02.5
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X24325PI-2.7 Даташит, Описание, Даташиты
X24325
DEVICE OPERATION
The X24325 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
onto the bus as a transmitter, and the receiving device
as the receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers, and pro-
vide the clock for both transmit and receive operations.
Therefore, the X24325 will be considered a slave in all
applications.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer
to Figures 1 and 2.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24325 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met.
Figure 1. Data Validity
SCL
SDA
DATA STABLE DATA
CHANGE
6552 ILL F04
Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (5V)
(6) tWR is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
Figure 2. Definition of Start and Stop
SCL
SDA
START BIT
STOP BIT
6552 ILL F05
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Номер в каталогеОписаниеПроизводители
X24325PI-2.7Advanced 2-Wire Serial E 2 PROM with Block Lock TM ProtectionXicor
Xicor

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