72425 PDF даташит
Спецификация 72425 изготовлена «Vishay Siliconix» и имеет функцию, называемую «N-Channel 150-V (D-S) 175C MOSFET». |
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Детали детали
Номер произв | 72425 |
Описание | N-Channel 150-V (D-S) 175C MOSFET |
Производители | Vishay Siliconix |
логотип |
3 Pages
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SPICE Device Model SUP80N15-20L
Vishay Siliconix
N-Channel 150-V (D-S) 175°C MOSFET
CHARACTERISTICS
• N- and P-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the −55 to 125°C
temperature ranges under the pulsed 0 to 10V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to
model the gate charge characteristics while avoiding convergence
difficulties of the switched Cgd model. All model parameter values
are optimized to provide a best fit to the measured electrical data
and are not intended as an exact physical interpretation of the
device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 72425
12-Jun-04
www.vishay.com
1
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SPICE Device Model SUP80N15-20L
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Conditions
Static
Gate Threshold Voltage
On-State Drain Currenta
Drain-Source On-State Resistancea
Forward Transconductancea
Forward Voltagea
Dynamicb
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Chargec
Gate-Source Chargec
Gate-Drain Chargec
Turn-On Delay Timec
Rise Timec
Turn-Off Delay Timec
Fall Timec
VGS(th)
ID(on)
rDS(on)
gfs
VSD
Ciss
Coss
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VDS = VGS, ID = 250 µA
VDS = 5 V, VGS = 10 V
VGS = 10 V, ID = 30 A
VGS = 10 V, ID = 30 A, TJ = 125°C
VGS = 10 V, ID = 30 A, TJ = 175°C
VGS = 4.5 V, ID = 20 A
VDS = 15 V, ID = 30 A
IS = 80 A, VGS = 0 V
VGS = 0 V, VDS = 25 V, f = 1 MHz
VDS = 50 V, VGS = 10 V, ID = 80 A
VDD = 50 V, RL = 0.93 Ω
ID ≅ 80 A, VGEN = 10 V, RG = 2.5 Ω
Notes
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%.
b. Guaranteed by design, not subject to production testing.
c. Independent of operating temperature.
Simulated Measured
Data
Data
1.7
314
0.016
0.023
0.026
0.017
93
0.92
6590
510
320
114
21
33
176
43
43
49
0.016
1
6500
520
270
110
21
33
20
100
70
135
Unit
V
A
Ω
S
V
Pf
NC
Ns
www.vishay.com
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Document Number: 72425
12-Jun-04
No Preview Available ! |
SPICE Device Model SUP80N15-20L
Vishay Siliconix
COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)
Document Number: 72425
12-Jun-04
www.vishay.com
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72425 | N-Channel 150-V (D-S) 175C MOSFET | Vishay Siliconix |
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