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3N166 PDF даташит

Спецификация 3N166 изготовлена ​​​​«Linear Integrated Systems» и имеет функцию, называемую «MONOLITHIC DUAL P-CHANNEL ENHANCEMENT MODE MOSFET».

Детали детали

Номер произв 3N166
Описание MONOLITHIC DUAL P-CHANNEL ENHANCEMENT MODE MOSFET
Производители Linear Integrated Systems
логотип Linear Integrated Systems логотип 

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3N166 Даташит, Описание, Даташиты
Linear Integrated Systems
FEATURES
VERY HIGH INPUT IMPEDANCE
HIGH GATE BREAKDOWN
ULTRA LOW LEAKAGE
LOW CAPACITANCE
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
(TA= 25°C unless otherwise noted)
Drain-Source or Drain-Gate Voltage (NOTE 2)
3N165
3N166
Transient G-S Voltage (NOTE 3)
Gate-Gate Voltage
Drain Current (NOTE 2)
Storage Temperature
Operating Temperature
Lead Temperature (Soldering, 10 sec.)
Power Dissipation (One Side)
Total Derating above 25°C
40 V
30 V
±125 V
±80 V
50 mA
-65°C to +200°C
-55°C to +150°C
+300°C
300 mW
4.2 mW/°C
3N165, 3N166
MONOLITHIC DUAL P-CHANNEL
ENHANCEMENT MODE MOSFET
17
35
84
Device Schematic
C
G1 G2
D1 D2
S
TO-99
Bottom View
ELECTRICAL CHARACTERISTICS (TA=25°C and VBS=0 unless otherwise specified)
LIMITS
SYMBOL
CHARACTERISTICS
MIN. MAX. UNITS
IGSSR
IGSSF
IDSS
ISDS
ID(on)
VGS(th)
VGS(th)
rDS(on)
gfs
gos
Ciss
Crss
Coss
RE(Yfs)
Gate Reverse Leakage Current
--
Gate Forward Leakage Current
--
--
Drain to Source Leakage Current
--
Source to Drain Leakage Current
--
On Drain Current
-5
Gate Source Threshold Voltage
-2
Gate Source Threshold Voltage
-2
Drain Source ON Resistance
--
Forward Transconductance
1500
Output Admittance
--
Input Capacitance
--
Reverse Transfer Capacitance
--
Output Capacitance
--
Common Source Forward Transconductance 1200
10
-10
-25
-200
-400
-30
-5
-5
300
3000
300
3.0
0.7
3.0
--
pA
mA
V
V
ohms
µs
µs
pF
µs
VGS= 40 V
VGS= -40 V
TA=+125°C
VDS= -20 V
VSD= -20 V
VDS= -15 V
VDS= -15 V
VDS= VGS
VGS= -20 V
VDS= -15V
VDS= -15V
(NOTE 4)
VDS= -15V
(NOTE 4)
CONDITIONS
VDB= 0
VGS= -10 V
ID= -10 µA
ID= -10 µA
ID= -100 µA
ID= -10mA
ID= -10mA
ID= -10mA
f=1kHz
f=1MHz
f=100MHz
Linear Integrated Systems 4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 • FAX: (510) 353-0261









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3N166 Даташит, Описание, Даташиты
MATCHING CHARACTERISTICS 3N165
SYMBOL
Yfs1/Yfs2
VGS1-2
VGS1-2/T
CHARACTERISTICS
Forward Transconductance Ratio
Gate Source Threshold Voltage Differential
Gate Source Threshold Voltage Differential
Change with Temperature
LIMITS
MIN. MAX.
0.90 1.0
-- 100
-- 100
UNITS
mV
µV/°C
CONDITIONS
VDS= -15 V ID= -500 µA
VDS= -15 V ID= -500 µA
VDS= -15 V IA= -500 µA
TA= -55°C to = +25°C
f=1kHz
R2
50
VDD
R1
TYPICAL SWITCHING WAVEFORM
10%
10%
tr
VOUT
t on 90%
10%
INPUT PULSE
Rise Time 2ns
Pulse Width200ns
Switching Times Test Circuit
Switching Times Test Circuit
10%
toff
SAMPLING SCOPE
Tr 0.2ns
CIN2pF
RIN10M
NOTES:
1. MOS field-effect transistors have extremely high input resistance and can be damaged by the accumulation of excess static
charge. To avoid possible damage to the device while wiring, testing, or in actual operation, follow these procedures:
To avoid the build-up of static charge, the leads of the devices should remain shorted together with a metal ring except when
being tested or used. Avoid unnecessary handling. Pick up devices by the case instead of the leads. Do not insert or remove
devices from circuits with the power on, as transient voltages may cause permanant damage to the devices.
2. Per transistor.
3. Devices must mot be tested at ±125V more than once, nor for longer than 300ms.
4. For design reference only, not 100% tested.
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress
ratings only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Linear Integrated Systems 4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 • FAX: (510) 353-0261










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