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PDF 3971 Data sheet ( Hoja de datos )
| Número de pieza | 3971 | |
| Descripción | DUAL DMOS FULL-BRIDGE DRIVER | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 3971 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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3971
ADVANCE INFORMATION
(Subject to change without notice)
May 2, 2000
NO
CONNECTION
1
NC
LOGIC
GROUND
2
S10 3
VDD
24
LOGIC
SUPPLY
23 PWM2
22 S20
OUT1A 4
LOAD 5
SUPPLY1
VBB1
GROUND 6
GROUND 7
21 OUT2A
LOAD
20
VBB2
SUPPLY2
19 GROUND
18 GROUND
SENSE1 8
17 SENSE2
OUT1B 99
16 OUT2B
S11 10
15 S21
PWM1 11
CP1 12
CHARGE PUMP
14 VCP
13 CP2
Dwg. PP-069-2
ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Load Supply Voltage, VBB ................ 50 V
Output Current, IOUT
Transient (<500 ns) ................... ±5 A
Logic Supply Voltage,
VDD ............................................ 7.0 V
Sense Voltage, VSENSE ...................... 0.5 V
Logic Input Voltage Range,
VIN .................. -0.3 V to VDD + 0.3 V
High-Side Gate Voltage ........... VBB + 8 V
Package Power Dissipation,
PD ............................................. 2.2 W
Operating Temperature Range,
TA ............................. -20°C to +85°C
Junction Temperature, TJ ............. +150°C
Storage Temperature Range,
TS ........................... -55°C to +150°C
Output duty cycle, ambient temperature, and
heat sinking may limit current rating. Under
any set of conditions, do not exceed the
specified current rating or a junction tempera-
ture of 150 °C.
DUAL DMOS
FULL-BRIDGE DRIVER
Designed to interface between external PWM control logic and
inductive loads such as relays, solenoids, dc motors, or stepper motors,
each full bridge can operate with output currents to ±2.5 A and operating
voltages to 50 V.
Low rDS(on) DMOS output drivers provide low power dissipation
during PWM operation. Internal charge pump circuitry is used to create
a boosted voltage to fully enhance the high-side DMOS switches.
Three TTL-compatible logic-input terminals per bridge allow flex-
ibility in configuring PWM control.
Internal circuit protection includes thermal shutdown with hysteresis,
and crossover-current protection. Special power -up sequencing is not
required.
The A3971SLB is supplied in a 24-lead plastic SOIC with a copper
batwing tab. The power tab is at ground potential and needs no electri-
cal isolation.
FEATURES
I ±2.5 A Load Current Capability per Bridge
I Parallel Outputs for 5 A Load-Current Capability
I Low rDS(on) Outputs
Typically 325 mΩ source, 175 mΩ sink
I Synchronous Rectification via Control Logic
I Internal Undervoltage Monitor
I Crossover-Current Protection
I Source Connections for External Current Sensing
I Thermal Shutdown Circuitry
Always order by complete part number: A3971SLB .
1 page  
3971
DUAL DMOS
FULL-BRIDGE DRIVER
Functional Description
Charge Pump. The DMOS output stage requires a
charge pump to bring the high-side gate-source voltage
approximately 8 V above the VBB supply. Two external
components are required, a pumping capacitor connected
between CP1 and CP2 and a reservoir capacitor connected
between VBB and VCP. Ceramic 0.22 µF capacitors are
recommended.
Control Logic. Each bridge is controlled by three TTL-
compatible inputs. The inputs are resistively pulled to
ground (via 250 kΩ). A crossover-delay circuit protects
the outputs from a shoot-thru condition when going from a
forward or reverse on state to synchronous rectification/
slow decay chop (both sink drivers on). If the logic is in
the DISABLE state and changes to an on state the 415 ns
crossover delay does not occur.
Protection Circuitry. In the event of a fault due to
excessive junction temperature, or low voltage on VCP or
VDD, the outputs of the device are disabled until the fault
condition is removed.
Current Sensing. If external current-sensing circuitry
is used, the sense resistor should have an independent
ground return to the ground terminal of the device. Due to
current transients during switching, a 0.1 µF capacitor
should be connected from the sense terminal to the
batwing tab connection of the package. This capacitor
reduces voltage swings at the terminal due to the fast di/dt,
which in turn ensures that the sink driver gate-source
voltage stays within the safe operating area. Allegro
MicroSystems recommends a value of RS given by:
RS = 0.5/ITRIP max.
Thermal protection. Circuitry turns off all drivers
when the junction temperature reaches 165°C, typically.
It is intended only to protect the device from failures due
to excessive junction temperatures and should not imply
that output short circuits are permitted. Thermal shut-
down has a hysteresis of approximately 15°C.
Layout. The printed wiring board should use a heavy
ground plane. For optimum electrical and thermal perfor-
mance, the driver should be soldered directly onto the
board. If external current sensing is used, the ground side
of RS should have an individual path to the ground
terminal(s) of the device. This path should be as short as
is possible physically and should not have any other
components connected to it. The load supply terminal
should be decoupled with an electrolytic capacitor
( >47 µF is recommended) placed as close to the device as
is possible.
Parallel Operation. For high-power applications, the
two DMOS full bridges in the A3971 may be connected in
parallel as shown below. The current will be shared
equally in each full bridge due to the positive temperature
coefficient of the DMOS rDS(on).
15–50 V
1 NC
VDD 24
2 23
3 22
4 21
5
VBB1
6
20
VBB2
19
7 18
8 17
99 16
10 15
11 14
12
CHARGE PUMP
13
+5 V
15–50 V
Dwg. EP-069
www.allegromicro.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 3971.PDF ] | |
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