CXD1196 PDF даташит
Спецификация CXD1196 изготовлена «Sony Corporation» и имеет функцию, называемую «CD-ROM DECODER». |
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Детали детали
Номер произв | CXD1196 |
Описание | CD-ROM DECODER |
Производители | Sony Corporation |
логотип |
28 Pages
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CXD1196AR
CD-ROM DECODER
For the availability of this product, please contact the sales office.
Description
The CXD1196AR is a CD-ROM decoder LSI with a
built-in ADPCM decoder.
80 pin LQFP (Plastic)
Features
• CD-ROM, CD-I and CD-ROM XA format
compatible
• Real time error correction
• Double speed playback compatible
(when VDD=5.0±10 %)
• Can be connected to a standard SRAM up to 32
Kbytes (256 Kbits).
• All audio output sampling frequency : 132.3 kHz
(Built-in oversampling filter)
• Built-in de-emphasis digital filter
• Capable of VDD 3.5 V operation
Applications
CD-ROM drive
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage VDD VSS –0.5 to +7.0 V
• Input voltage
VI VSS –0.5 to VDD +0.5 V
• Output voltage VO VSS –0.5 to VDD +0.5 V
• Operating temperature
Topr
–20 to +75
°C
• Storage temperature
Tstg
–55 to +150
°C
Recommended Operating Conditions
• Supply voltage
VDD +3.5 to +5.5 (+5.0 Typ.) V
• Operating temperature
Topr
–20 to +75
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E92128B78-TE
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Block Diagram
CXD1196AR
C2PO 34
BCLK 36
DATA 37
LRCK 38
XRST 59
MAO-MA14
5-11.13-20
XMOE XMWR MDBO-MDB7
34
24-31
ADDRESS GEN
DMA
SEQUENCER
PRIORITY
RESOLVER
DMA FIFO
CPU I/F
COP I/F
DESCRAMBLER
SYNC CONTROL
GALOIS FIELD
ECC
SYNDROME GEN CORRECTOR
CLOCK GEN
55 54 57
XTL1 XTL2 CLK
2.12.23.32.42.52.63.72
GND
CPU DMA
ADPCM
DECODER
33.73
VDD
DIGITAL
FILTER
35
EMP
DAC
I/F
69
DO-D7
78
64 XRD
65 XWR
66 XCS
68 AO
67 INT
44 INTP
51 DRO
53 XDAC
45 WCKO
46 LRCO
47 DATO
48 BCKO
50 MUTE
—2—
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Pin Description
No. Symbol
1 TD7
2 GND
3 XMOE
4 XMWR
5 MA0
6 MA1
7 MA2
8 MA3
9 MA4
10 MA5
11 MA6
12 GND
13 MA7
14 MA8
15 MA9
16 MA10
17 MA11
18 MA12
19 MA13
20 MA14
21 TD6
22 TD5
23 GND
24 MDB0
25 MDB1
26 MDB2
27 MDB3
28 MDB4
29 MDB5
30 MDB6
31 MDB7
32 GND
33 VDD
34 C2PO
35 EMP
36 BCLK
37 DATA
38 LRCK
39 TD4
40 TD3
I/O Description
I/O Test pin
— Ground pin
O Buffer memory output enable negative logic signal
O Buffer memory write enable negative logic signal
O Buffer memory address (LSB)
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
— Ground pin
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address
O Buffer memory address (MSB)
I/O Test pin
I/O Test pin
— Ground pin
I/O Buffer memory data bus (LSB)
I/O Buffer memory data bus
I/O Buffer memory data bus
I/O Buffer memory data bus
I/O Buffer memory data bus
I/O Buffer memory data bus
I/O Buffer memory data bus
I/O Buffer memory data bus (MSB)
— Ground pin
— Power supply pin
I C2 pointer positive logic signal from CD player
I Emphasis positive logic signal from CD player
I Bit clock signal from CD player
I Data signal from CD player
I LR clock signal from CD player
I/O Test pin
I/O Test pin
—3—
CXD1196AR
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