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100313D PDF даташит

Спецификация 100313D изготовлена ​​​​«National Semiconductor» и имеет функцию, называемую «Low Power Quad Driver».

Детали детали

Номер произв 100313D
Описание Low Power Quad Driver
Производители National Semiconductor
логотип National Semiconductor логотип 

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100313D Даташит, Описание, Даташиты
August 1998
100313
Low Power Quad Driver
General Description
The 100313 is a monolithic quad driver with two OR and two
NOR outputs and common enable. The common input is
buffered to minimize input loading. If the D inputs are not
used the Enable can be used to drive sixteen 50lines. All
inputs have 50 kpull-down resistors and all outputs are
buffered.
Features
n 50% power reduction of the 100113
n 2000V ESD protection
n Pin/function compatible with 100113 and 100112
n Voltage compensated operating range = −4.2V to −5.7V
n Standard Microcircuit Drawing
(SMD) 5962-9673201
Logic Symbol
Pin Names
Da– Dd
E
Ona– Ond
Ona– Ond
Description
Data Inputs
Enable Input
Data Outputs
Complementary Data Outputs
DS100297-3
Connection Diagrams
24-Pin DIP
24-Pin Flatpak
DS100297-1
DS100297-2
© 1998 National Semiconductor Corporation DS100297
PrintDate=1998/08/31 PrintTime=07:05:03 45028 ds100297 Rev. No. 1 cmserv Proof
www.national.com
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100313D Даташит, Описание, Даташиты
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature (TSTG)
Maximum Junction Temperature (TJ)
Ceramic
VEE Pin Potential to Ground Pin
Input Voltage (DC)
Output Current (DC Output HIGH)
ESD (Note 2)
−65˚C to +150˚C
+175˚C
−7.0V to +0.5V
VEE to +0.5V
−50 mA
2000V
Recommended Operating
Conditions
Case Temperature (TC)
Military
−55˚C to +125˚C
Supply Voltage (VEE)
−5.7V to −4.2V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C
Symbol
Parameter
VOH Output HIGH Voltage
Min
−1025
−1085
Max
−870
−870
Units
mV
mV
TC
0˚C to +125˚C
−55˚C
VOL Output LOW Voltage −1830 −1620 mV 0˚C to +125˚C
−1830 −1555 mV
−55˚C
VOHC
Output HIGH Voltage −1035
−1085
mV 0˚C to +125˚C
mV −55˚C
VOLC Output LOW Voltage
−1610 mV
−1555 mV
0˚C to +125˚C
−55˚C
VIH Input HIGH Voltage −1165 −870 mV −55˚C to +125˚C
VIL
Input LOW Voltage
−1830 −1475 mV −55˚C to +125˚C
IIL Input LOW Current 0.50
µA −55˚C to +125˚C
IIH Input HIGH Current
Data
350 µA
0˚C to +125˚C
Enable
240
Data
500 µA
−55˚C
Enable
340
IEE Power Supply Current −65 −20 mA −55˚C to +125˚C
Conditions
Notes
VIN =VIH (Max)
or VIL(Min)
Loading with
50to −2.0V
(Notes 3, 4,
5)
VIN =VIH (Min)
or VIL (Max)
Loading with
50to −2.0V
(Notes 3, 4,
5)
Guaranteed HIGH Signal
for All Inputs
Guaranteed LOW Signal
for All Inputs
VEE = −4.2V
VIN = VIL (Min)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5)
VEE = −5.7V
VIN = VIH (Max)
Inputs Open
(Notes 3, 4,
5)
(Notes 3, 4,
5)
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing VOH/VOL.
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PrintDate=1998/08/31 PrintTime=07:05:03 45028 ds100297 Rev. No. 1 cmserv Proof
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100313D Даташит, Описание, Даташиты
Military Version
AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
TC = −55˚C
Min Max
tPLH Propagation Delay
tPHL Data to Output
tPLH Propagation Delay
tPHL Enable to Output
tTLH Transition Time
tTHL 20% to 80%, 80% to
20%
0.30 2.00
0.50 2.40
0.30 2.00
TC = +25˚C
Min Max
0.30 1.80
0.60 2.30
0.30 1.90
TC = +125˚C
Min Max
0.30 2.30
Units
ns
Conditions
0.60 2.70 ns Figures 1, 2
0.30 2.00
ns
Notes
(Notes 7,
8, 10, 11)
(Note 10)
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100% on each device at +25˚C, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).
Note 11: The propagation delay specified is for single output switching. Delays may vary up to 150 ps with multiple outputs switching.
Test Circuitry
Notes:
VCC, VCCA = +2V, VEE = −2.5V.
L1 and L2 = equal length 50impedance lines.
RT = 50terminator internal to scope.
Decoupling 0.1 µF from GND to VCC and VEE.
All unused outputs are loaded with 50to GND.
CL = Fixture and stray capacitance 3 pF.
Pin numbers shown are for flatpak; for DIP see logic symbol.
FIGURE 1. AC Test Circuit
DS100297-5
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PrintDate=1998/08/31 PrintTime=07:05:04 45028 ds100297 Rev. No. 1 cmserv Proof
www.national.com
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