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PDF HS-82C37ARH Data sheet ( Hoja de datos )
| Número de pieza | HS-82C37ARH | |
| Descripción | Radiation Hardened CMOS High Performance Programmable DMA Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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HS-82C37ARH
August 1995
Radiation Hardened CMOS High
Performance Programmable DMA Controller
Features
Description
• Radiation Hardened
- Total Dose >105 RAD (Si)
- Transient Upset > 108 RAD (Si)/s
- Latch Up Free EPI-CMOS
• Low Power Consumption
- IDDSB = 50µA Maximum
- IDDOP = 4.0mA/MHz Maximum
• Pin Compatible with NMOS 8237A and the Intersil
82C37A
The Intersil HS-82C37ARH is an enhanced, radiation
hardened CMOS version of the industry standard 8237A
Direct Memory Access (DMA) controller, fabricated using the
Intersil hardened field, self-aligned silicon gate CMOS
process. The HS-82C37ARH offers increased functionality,
improved performance, and dramatically reduced power
consumption for the radiation environment. The high speed,
radiation hardness, and industry standard configuration of
the HS-82C37ARH make it compatible with radiation
hardened microprocessors such as the HS-80C85RH and
the HS-80C86RH.
• High Speed Data Transfers Up To 2.5 MBPS With 5MHz
Clock
• Four Independent Maskable Channels With Autoinitializa-
tion Capability
• Expandable to Any Number of Channels
• Memory-to-Memory Transfer Capability
• CMOS Compatible
• Hardened Field, Self-Aligned, Junction Isolated CMOS
Process
• Single 5V Supply
• Military Temperature Range -55oC to +125oC
The HS-82C37ARH can improve system performance by
allowing external devices to transfer data directly to or from
system memory. Memory-to-memory transfer capability is
also provided, along with a memory block initialization
feature. DMA requests may be generated by either
hardware or software, and each channel is independently
programmable with a variety of features for flexible
operation.
Static CMOS circuit design insures low operating power and
allows gated clock operation for an even further reduction of
power. Multimode programmability allows the user to select
from three basic types of DMA services, and reconfiguration
under program control is possible even with the clock to the
controller stopped. Each channel has a full 64K address and
word count range, and may be programmed to autoinitialize
these registers following DMA termination (end of process).
The Intersil hardened field CMOS process results in
performance equal to or greater than existing radiation resis-
tant products at a fraction of the power.
Ordering Information
PART NUMBER
HS1-82C37ARH-Q
HS1-82C37ARH-8
HS1-82C37ARH-Sample
HS9-82C37ARH-Q
HS9-82C37ARH-8
HS9-82C37ARH/Sample
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
-55oC to +125oC
-55oC to +125oC
+25oC
PACKAGE
40 Lead SBDIP
40 Lead SBDIP
40 Lead SBDIP
42 Lead Ceramic Flatpack
42 Lead Ceramic Flatpack
42 Lead Ceramic Flatpack
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
918
Spec Number 518058
File Number 3042.1
1 page  
Specifications HS-82C37ARH
Absolute Maximum Ratings
Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.5V
Input or Output Voltage Applied . . . . . . . .VSS - 0.3V to VDD + 0.3V
for All Grades
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Typical Derating Factor. . . . . . . . . . . . 4mA/MHz Increase in IDDOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
SBDIP Package. . . . . . . . . . . . . . . . . . . . 38oC/W
θJC
5oC/W
Ceramic Flatpack Package . . . . . . . . . . . 72oC/W 10oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.32W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26.3mW/C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .13.9mW/C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage Range (VDD) . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to +0.8V
Input High Voltage. . . . . . . . . . . . . . . . . . . . . . . . VDD -1.5V to VDD
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
TTL Output High Voltage
CMOS Output High Volt-
age
Output Low Voltage
Input Leakage Current
Output Leakage Current
Standby Power Supply
Current
Operating Power Supply
Current
Functional Tests
Noise Immunity Functional
Test
SYMBOL
VOH1
VOH2
VOL1
IIL or IIH
IOZL or
IOZH
IDDSB
IDDOP
FT
FN
CONDITIONS
GROUP A
SUBGROUP
VDD = 4.5V, IO = -2.5mA,
VIN = 0V or 4.0V
1, 2, 3
VDD = 4.5V, IO = -100µA,
VIN = 0V or 4.0V
1, 2, 3
VDD = 4.5V, IO = +2.5mA,
VIN = 0V or 4.0V
1, 2, 3
VDD = 5.5V, VIN = 0V or
5.5V Pins: 6, 7, 11-13, 16-19
1, 2, 3
VDD = 5.5V, VIN = 0V or
5.5V Pins: 1-4, 21-23, 26-
30, 32-40
1, 2, 3
VDD = 5.5V, IO = 0mA,
VIN = GND or VDD
1, 2, 3
VDD = 5.5V, IO = 0mA,
VIN = GND or VDD,
f = 5MHz
1, 2, 3
VDD = 4.5V and 5.5V,
VIN = GND or VDD,
f = 1MHz
7, 8A, 8B
VDD = 4.5V and 5.5V, VIN =
GND or VDD - 1.5V and
VDD = 4.5V, VIN = 0.8V or
VDD
7, 8A, 8B
LIMITS
TEMPERATURE MIN MAX UNITS
+25oC, +125oC,
-55oC
3.0
-
V
+25oC, +125oC, VDD-
-55oC
0.4
-
V
+25oC, +125oC,
-55oC
-
0.4
V
+25oC, +125oC,
-55oC
-1.0
1.0
µA
+25oC, +125oC,
-55oC
-10
10
µA
+25oC, +125oC, - +50 µA
-55oC
+25oC, +125oC,
-55oC
-
20 mA
+25oC, +125oC,
-55oC
-
-
-
+25oC, +125oC,
-55oC
-
-
-
Spec Number 518058
922
5 Page 
HS-82C37ARH
Intersil Space Level Product Flow -8
GAMMA Radiation Verification (Each Wafer) Method 1019,
2 Samples/Wafer, 0 Rejects
100% Dynamic Burn-In, Condition D, 160 Hours, +125oC or
Equivalent, Method 1015
100% Die Attach
100% Interim Electrical Test
Periodic- Wire Bond Pull Monitor, Method 2011
100% PDA, Method 5004 (Note 1)
Periodic- Die Shear Monitor, Method 2019 or 2027
100% Final Electrical Test
100% Internal Visual Inspection, Method 2010, Condition B 100% Fine/Gross Leak, Method 1014
CSI an/or GSI PreCap (Note 5)
100% External Visual, Method 2009
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% External Visual
100% Initial Electrical Test
Sample - Group A, Method 5005 (Note 2)
Sample - Group B, Method 5005 (Note 3)
Sample - Group C, Method 5005 (Notes 3 and 4)
Sample - Group D, Method 5005 (Notes 3 and 4)
100% Data Package Generation (Note 6)
CSI and/or GSI Final (Note 5)
NOTES:
1. Failures from subgroup 1, 7 are used for calculating PDA. The maximum allowable PDA = 5%.
2. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
3. Group B, C and D inspections are optional and will not be performed unless required by the P.O. When required, the P.O. should include
separate line items for Group B Test, Group C Test, Group C Samples, Group D Test and Group D Samples.
4. Group C and/or Group D Generic Data, as defined by MIL-I-38535, is optional and will not be supplied unless required by the P.O. When
required, the P.O. should include a separate line item for Group C Generic Data and/or Group D Generic Data. Generic data is not guar-
anteed to be available and is therefore not available in all cases.
5. CSI and/or GSI inspections are optional and will not be performed unless required by theP.O. When required, the P.O. should include
separate line items for CSI PreCap inspection, CSI final inspection, GSI PreCap inspection, and/or GSI final inspection.
6. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Group B, C and D attributes and/or Generic data is included when required by the P.O.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
AC Test Circuit
OUTPUT FROM
DEVICE UNDER TEST
V1
R1
TEST POINT
C1*
*Includes Stray and Jig Capacitance
AC Testing Input, Output Waveforms
VDD -1.5V
INPUT
VIL -0.4V
1.5V
VOH
OUTPUT
VOL
OUTPUT
Z L OR H
2.0V
0.8V
VOH
VOL
VOH
L OR H
VOH - 0.45V
0.45
Z
TEST CONDITION DEFINITION TABLE
PINS
V1 R1 C1
All Output Except EOP
1.7V
510Ω
100pF
EOP
VDD
1.6KΩ
50pF
Spec Number 518058
928
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet HS-82C37ARH.PDF ] | |
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