DataSheet26.com

AD9873 PDF даташит

Спецификация AD9873 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «Analog Front End Converter for Set-Top Box/ Cable Modem».

Детали детали

Номер произв AD9873
Описание Analog Front End Converter for Set-Top Box/ Cable Modem
Производители Analog Devices
логотип Analog Devices логотип 

30 Pages
scroll

No Preview Available !

AD9873 Даташит, Описание, Даташиты
a
Analog Front End Converter for
Set-Top Box, Cable Modem
AD9873
FEATURES
Low-Cost 3.3 V CMOS Analog Front End Converter for
MCNS-DOCSIS, DVB, DAVIC-Compliant
Set-Top Box, Cable Modem Applications
232 MHz Quadrature Digital Upconverter
DC to 65 MHz Output Bandwidth
12-Bit Direct IF D/A Converter (TxDAC+®)
Programmable Reference Clock Multiplier (PLL)
Direct Digital Synthesis
Interpolator
SIN(x)/x Compensation Filter
Four Programmable, Pin-Selectable Modulator Profiles
Single-Tone Mode for Frequency Synthesis Applications
12-Bit, 33 MSPS Sampling Direct IF A/D Converter with
Auxiliary Automatic Clamp Video Input Multiplexer
10-Bit, 33 MSPS Sampling Direct IF A/D Converter
Dual 8-Bit, 16.5 MSPS Sampling IQ A/D Converter
Two Independently Programmable Sigma-Delta
Converters
Direct Interface to AD8321/AD8323 PGA Cable Driver
Programmable Frequency Output
Power-Down Modes
APPLICATIONS
Cable and Satellite Systems
PC Multimedia
Digital Communications
Data and Video Modems
Cable Modem
Set-Top Boxes
Powerline Modem
Broadband Wireless Communication
FUNCTIONAL BLOCK DIAGRAM
Tx IQ
Tx SYNC
SERIAL ITF
PROFILE
Tx INTERPOLATOR
FILTER
PLL DDS
AD9873
COS
INV 12
SINC
DAC
SIN
3
4 12
2
CONTROL FUNCTIONS
12
Rx IQ
Rx IF
Rx SYNC
Rx
8
ADC
8
ADC
10
ADC
Tx
CA
SDELTA0
SDELTA1
REF CLK
IIN
QIN
IF10
12 ADC
MUX
IF12
VIDEO
GENERAL DESCRIPTION
The AD9873 integrates a complete 232 MHz quadrature
digital transmitter and a multichannel receiver with four high-
performance analog-to-digital converters (ADC) for various
video and digital data signals. The AD9873 is designed for cable
modem set-top box applications, where cost, size, power dissi-
pation, and dynamic performance are critical attributes. A single
external crystal is used to control all internal conversion and
data processing cycles.
The transmit section of the AD9873 includes a high-speed
direct digital synthesizer (DDS), a high-performance, high-speed
12-bit digital-to-analog converter (DAC), programmable clock
multiplier circuitry, digital filters, and other digital signal
processing functions, to form a complete quadrature digital
up-converter device.
On the receiver side, two 8-bit ADCs are optimized for IQ
demodulated “out-of band” signals. An on-chip 10-bit ADC
is typically used as a direct IF input of 256 QAM modulated
signals in cable modem applications. A second direct IF input
and an auxiliary video input with automatic programmable clamp
function are multiplexed to a high-performance 12-bit video ADC.
The chip’s programmable sigma-delta modulated outputs and
an output clock may be used to control external components
such as programmable gain amplifiers (PGA) and mixer stages.
Three pins provide a direct interface to the AD8321/AD8323
programmable gain amplifier (PGA) cable driver.
The AD9873 is available in a space-saving 100-lead MQFP package.
TxDAC+ is a registered trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000









No Preview Available !

AD9873 Даташит, Описание, Даташиты
AD9873
TABLE OF CONTENTS
Page
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 1
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . 7
THERMAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . 7
EXPLANATION OF TEST LEVELS . . . . . . . . . . . . . . . . 7
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
DEFINITIONS OF TERMS . . . . . . . . . . . . . . . . . . . . . . . 8
PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . 9
PIN CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . 10
REGISTER BIT DEFINITIONS . . . . . . . . . . . . . . . . . . . 12
TYPICAL PERFORMANCE CHARACTERISTICS . . . 14
Typical Power Consumption Characteristics . . . . . . . . . 14
Dual Sideband Transmit Spectrum . . . . . . . . . . . . . . . . 14
Single Sideband Transmit Spectrum . . . . . . . . . . . . . . . 15
Typical QAM Transmit Performance Characteristics . . 16
Typical ADC Performance Characteristics . . . . . . . . . . . 18
THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . 20
Transmit Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
OSC IN Clock Multiplier . . . . . . . . . . . . . . . . . . . . . . . . 21
Receive Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CLOCK AND OSCILLATOR CIRCUITRY . . . . . . . . . . 22
PROGRAMMABLE CLOCK OUTPUT REF CLK . . . . 23
SIGMA-DELTA OUTPUTS . . . . . . . . . . . . . . . . . . . . . . 23
SERIAL INTERFACE FOR REGISTER CONTROL . . . 23
General Operation of the Serial Interface . . . . . . . . . . . . 23
Instruction Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Serial Interface Port Pin Description . . . . . . . . . . . . . . . 24
MSB/LSB Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Notes on Serial Port Operation . . . . . . . . . . . . . . . . . . . 24
Page
TRANSMIT PATH (Tx) . . . . . . . . . . . . . . . . . . . . . . . . . 24
Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Data Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Half-Band Filters (HBFs) . . . . . . . . . . . . . . . . . . . . . . . 25
Cascaded Integrator—COMB (CIC) Filter . . . . . . . . . . 25
Combined Filter Response . . . . . . . . . . . . . . . . . . . . . . . 25
Inverse SINC Filter (ISF) . . . . . . . . . . . . . . . . . . . . . . . 27
Tx Signal Level Considerations . . . . . . . . . . . . . . . . . . . 28
Tx Throughput and Latency . . . . . . . . . . . . . . . . . . . . . 28
D/A Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PROGRAMMING/WRITING THE AD8321/AD8323
CABLE DRIVER AMPLIFIER GAIN CONTROL . . . 29
RECEIVE PATH (Rx) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ADC Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . 30
Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Driving the Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . 30
Op Amp Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . 31
ADC Differential Inputs . . . . . . . . . . . . . . . . . . . . . . . . 31
ADC Voltage References . . . . . . . . . . . . . . . . . . . . . . . . 31
Video Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
POWER AND GROUNDING CONSIDERATIONS . . . 32
EVALUATION BOARD . . . . . . . . . . . . . . . . . . . . . . . . . 33
Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . 39
–2– REV. 0









No Preview Available !

AD9873 Даташит, Описание, Даташиты
SPECIFICATIONS (VAS = 3.3 V ؎ 5%, VDS = 3.3 V ؎ 10%, fOSCIN = 27 MHz, fSYSCLK = 216 MHz, fMCLK = 54 MHz
(M = 8, N = 4), ADC Sample Rate derived from PLL fMCLK , RSET = 10 k, 75 DAC Load)
Parameter
Temp
Test
Level
Min
Typ Max
SYSTEM CLOCK, DAC SAMPLING fSYSCLK
Frequency Range
Full III
232
OSC IN and XTAL CHARACTERISTICS
Frequency Range
Duty Cycle
Input Capacitance
Input Resistance
Full
25ЊC
25ЊC
25ЊC
III
III
IV
IV
3
35
33
50 65
3
100
MCLK OUT JITTER (fMCLK Derived from PLL)
25ЊC
IV
6
TxDAC CHARACTERISTICS1
Resolution
Full-Scale Output Current
Gain Error (Using Internal Reference)
Output Offset
Reference Voltage (REFIO Level)
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Output Capacitance
Phase Noise @ 1 kHz Offset, 42 MHz
Output Voltage Compliance Range
Wideband SFDR
5 MHz Analog Out, IOUT = 4 mA
65 MHz Analog Out, IOUT = 4 mA
Narrowband SFDR (Ϯ100 kHz Window)
65 MHz Analog Out, IOUT = 4 mA
N/A N/A
12
Full III
2
4 20
25ЊC
I
–3 0.14 +3
25ЊC
I
–1
+1
25°C
I
1.18 1.23 1.28
25ЊC
IV
± 2.5
25ЊC
IV
±8
25ЊC
IV
5
25ЊC
IV
–113
Full III
–0.5
+1.5
25ЊC
25ЊC
IV
IV
59
54
25ЊC
IV
79
Tx MODULATOR CHARACTERISTICS
I/Q Offset
Pass Band Amplitude Ripple (f < fIQCLK/8)
Pass Band Amplitude Ripple (f < fIQCLK/4)
Stop Band Response (f > fIQCLK × 3/4)
Full III
Full III
Full III
Full III
50
55
Ϯ0.1
Ϯ0.5
–63
8-BIT ADC CHARACTERISTICS
Resolution
N/A N/A
8
Conversion Rate
Full III
16.5
Pipeline Delay
N/A N/A
3.5
DC Accuracy
Differential Nonlinearity
25ЊC
IV
Ϯ0.5
Integral Nonlinearity
25ЊC
IV
Ϯ0.5
Offset Error for Each 8-Bit ADC
25ЊC
IV
Ϯ0.75
Gain Error for Each 8-Bit ADC
25ЊC
IV
Ϯ4
Offset Matching Between 8-Bit ADCs
Full IV
Ϯ3
Gain Matching Between 8-Bit ADCs
Full IV
Ϯ4.5
Analog Input
Input Voltage Range
Full IV
1
Input Capacitance
25ЊC
IV
1.4
Differential Input Resistance
25ЊC
IV
4
Aperture Delay
25ЊC
IV
2.0
Aperture Uncertainty (Jitter)
25ЊC
IV
1.2
Input Bandwidth (–3 dB)
25ЊC
IV
90
Input Referred Noise
25ЊC
IV
600
Reference Voltage Error
REFT8–REFB8 (0.5 V)
25ЊC
I
± 4 ± 92
Dynamic Performance (AIN = –0.5 dB FS, f = 5 MHz)
Signal-to-Noise and Distortion Ratio (SINAD)
Full
II
43.5 48
AD9873
Unit
MHz
MHz
%
pF
M
ps rms
Bits
mA
% FS
% FS
V
LSB
LSB
pF
dBc/Hz
V
dBc
dBc
dBc
dB
dB
dB
dB
Bits
MHz
ADC Cycles
LSB
LSB
% FSR
% FSR
LSB
LSB
V p-p
pF
k
ns
ps rms
MHz
µV
mV
dB
REV. 0
–3–










Скачать PDF:

[ AD9873.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
AD9870IF Digitizing SubsystemAnalog Devices
Analog Devices
AD9873Analog Front End Converter for Set-Top Box/ Cable ModemAnalog Devices
Analog Devices
AD9874IF Digitizing SubsystemAnalog Devices
Analog Devices
AD9875Broadband Modem Mixed-Signal Front EndAnalog Devices
Analog Devices

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск