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AD5516 PDF даташит

Спецификация AD5516 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «16-Channel/ 12-Bit Voltage-Output DAC with 14-Bit Increment Mode».

Детали детали

Номер произв AD5516
Описание 16-Channel/ 12-Bit Voltage-Output DAC with 14-Bit Increment Mode
Производители Analog Devices
логотип Analog Devices логотип 

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AD5516 Даташит, Описание, Даташиты
a 16-Channel, 12-Bit Voltage-Output DAC
with 14-Bit Increment Mode
AD5516*
FEATURES
High Integration:
16-Channel DAC in 12 mm ؋ 12 mm LFBGA
14-Bit Resolution via Increment/Decrement Mode
Guaranteed Monotonic
Low Power, SPITM, QSPITM, MICROWIRETM, and DSP-
Compatible
3-Wire Serial Interface
Output Impedance 0.5
Output Voltage Range
؎2.5 V (AD5516-1)
؎5 V (AD5516-2)
؎10 V (AD5516-3)
Asynchronous Reset-Facility (via RESET Pin)
Asynchronous Power-Down Facility (via PD Pin)
Daisy-Chain Mode
Temperature Range: –40؇C to +85؇C
GENERAL DESCRIPTION
The AD5516 is a 16-channel, 12-bit voltage-output DAC. The
selected DAC register is written to via the 3-wire serial interface.
DAC selection is accomplished via address bits A3–A0. 14-bit
resolution can be achieved by fine adjustment in Increment/
Decrement Mode (Mode 2). The serial interface operates at
clock rates up to 20 MHz and is compatible with standard SPI,
MICROWIRE, and DSP interface standards. The output volt-
age range is fixed at ± 2.5 V (AD5516-1), ± 5 V (AD5516-2),
and ± 10 V (AD5516-3). Access to the feedback resistor in each
channel is provided via RFB0 to RFB15 pins.
The device is operated with AVCC = 5 V ± 5%, DVCC = 2.7 V to
5.25 V, VSS = –4.75 V to –12 V, and VDD = +4.75 V to +12 V
and requires a stable 3 V reference on REF_IN.
PRODUCT HIGHLIGHTS
1. Sixteen 12-bit DACs in one package, guaranteed monotonic
APPLICATIONS
Level Setting
Instrumentation
Automatic Test Equipment
Optical Networks
Industrial Control Systems
Data Acquisition
Low Cost I/O
2. Available in a 74-lead LFBGA package with a body size of
12 mm ؋ 12 mm
FUNCTIONAL BLOCK DIAGRAM
RESET
BUSY
DACGND
AGND
DGND
DCEN
DVCC
AVCC
AD5516
ANALOG
CALIBRATION
LOOP
MODE1
INTERFACE
CONTROL
LOGIC
REF_IN
VBIAS
VDD
VSS
RO F F S
RFB
DAC
RO F F S
RFB
DAC
RO F F S
RFB
DAC
RO F F S
RFB
MODE2
7-BIT BUS
DAC
POWER-DOWN
LOGIC
RFB0
VOUT0
RFB1
VOUT1
RFB14
VOUT14
RFB15
VOUT15
SCLK DIN DOUT SYNC
*Protected by U.S. Patent No. 5,969,657; other patents pending
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
PD
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002









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AD5516 Даташит, Описание, Даташиты
AD5516–SPECIFICATIONS (VDD = +4.75 V to +13.2 V, VSS = –4.75 V to –13.2 V; AVCC = 4.75 V to 5.25 V; DVCC =
2.7 V to 5.25 V; AGND = DGND = DACGND = 0 V; REF_IN = 3 V; All outputs unloaded.
All specifications TMIN to TMAX unless otherwise noted.)
Parameter1
A Version2
Unit
Conditions/Comments
DAC DC PERFORMANCE
Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Increment/Decrement Step-Size
Bipolar Zero Error
Positive Full-Scale Error
Negative Full-Scale Error
12
±2
–1/+1.3
± 0.25
±7
± 10
± 10
Bits
LSB max
LSB max
LSB typ
LSB max
LSB max
LSB max
Mode 1
± 0.5 LSB typ, Monotonic; Mode 1
Monotonic; Mode 2 Only
VOLTAGE REFERENCE
REF_IN
Nominal Input Voltage
Input Voltage Range3
Input Current
3
2.875/3.125
±1
V
V min/max
µA max
< 1 nA typ
ANALOG OUTPUTS (VOUT 0–15)
Output Temperature Coefficient3, 4
DC Output Impedance3
Output Range5
AD5516-1
AD5516-2
AD5516-3
Resistive Load3, 6
Capacitive Load3, 6
Short-Circuit Current3
DC Power-Supply Rejection Ratio3
DC Crosstalk3
10
0.5
± 2.5
±5
± 10
5
200
7
–85
120
ppm/°C typ
typ
V typ
V typ
V typ
kmin
pF
mA typ
dB typ
µV max
of FSR
VDD = +12 V ± 5%, VSS = –12 V ± 5%
DIGITAL INPUTS3
Input Current
± 10
µA max
± 5 µA typ
Input Low Voltage
0.8
V max
DVCC = 5 V ± 5%
0.4
V max
DVCC = 3 V ± 10%
Input High Voltage
2.4
V min
DVCC = 5 V ± 5%
2
V min
DVCC = 3 V ± 10%
Input Hysteresis (SCLK and SYNC) 150 mV typ
Input Capacitance
10
pF max
5 pF typ
DIGITAL OUTPUTS (BUSY, DOUT)3
Output Low Voltage, DVCC = 5 V
Output High Voltage, DVCC = 5 V
Output Low Voltage, DVCC = 3 V
Output High Voltage, DVCC = 3 V
High Impedance Leakage Current (DOUT only)
High Impedance Output Capacitance (DOUT only)
0.4
4
0.4
2.4
±1
5
V max
V min
V max
V min
µA max
pF typ
Sinking 200 µA
Sourcing 200 µA
Sinking 200 µA
Sourcing 200 µA
DCEN = 0
DCEN = 0
POWER REQUIREMENTS
Power Supply Voltages
VDD
VSS
AVCC
DVCC
Power Supply Currents7
IDD
ISS
AICC
DICC
Power-Down Currents7
IDD
ISS
AICC
DICC
Power Dissipation7
+4.75/+15.75
–4.75/–15.75
4.75/5.25
2.7/5.25
5
5
17
1.5
2
3
2
2
105
V min/max
V min/max
V min/max
V min/max
mA max
mA max
mA max
mA max
µA max
µA max
µA max
µA max
mW typ
3.5 mA typ. All Channels Full-Scale
3.5 mA typ. All Channels Full-Scale
13 mA typ
1 mA typ
200 nA typ
200 nA typ
200 nA typ
200 nA typ
VDD = +5 V, VSS = –5 V
NOTES
1See Terminology section.
2A Version: Industrial temperature range –40°C to +85°C; typical at +25°C.
3Guaranteed by design and characterization; not production tested.
4AD780 as reference for the AD5516.
5Output range is restricted from VSS + 2 V to VDD – 2 V. Output span varies with reference voltage and is functional down to 2 V.
6Ensure that you do not exceed TJ (MAX). See Absolute Maximum Ratings section.
7Outputs unloaded.
Specifications subject to change without notice.
–2– REV. 0









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AD5516 Даташит, Описание, Даташиты
AD5516
AC CHARACTERISTICS (VDD = +4.75 V to +13.2 V, VSS = –4.75 V to –13.2 V; AVCC = 4.75 V to 5.25 V; DVCC = 2.7 V to 5.25 V; AGND = DGND
= DACGND = 0 V; REF_IN = 3 V; All outputs unloaded. All specifications TMIN to TMAX unless otherwise noted.)
Parameter1, 2
Output Voltage Settling Time (Mode 1)4
Output Voltage Settling Time (Mode 2)4
Slew Rate
Digital-to-Analog Glitch Impulse
Digital Crosstalk
Analog Crosstalk AD5516-1
Digital Feedthrough
Output Noise Spectral Density @ 1 kHz
A Version3
32
2.5
0.85
1
5
10
1
150
Unit
s max
s max
V/s typ
nV-s typ
nV-s typ
nV-s typ
nV-s typ
nV/(Hz)1/2 typ
Conditions/Comments
100 pF, 5 kLoad Full-Scale Change
100 pF, 5 kLoad, 1 Code Increment
1 LSB Change around Major Carry
AD5516-1
NOTES
1See Terminology section.
2Guaranteed by design and characterization; not production tested.
3A version: Industrial temperature range –40°C to +85°C.
4 Timed from the end of a write sequence.
Specifications subject to change without notice.
TIMING CHARACTERISTICS (VDD = +4.75 V to +13.2 V, VSS = – 4.75 V to –13.2 V; AVCC = 4.75 V to 5.25 V; DVCC = 2.7 V to 5.25 V;
AGND = DGND = DACGND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
Limit at TMIN, TMAX
Parameter1, 2, 3 (A Version)
Unit
Conditions/Comments
fUPDATE1
fUPDATE2
fCLKIN
t1
t2
t3
t4
t5
t6
t7
t7MODE2
t8MODE1
t9MODE2
t10
t114
t12
32
750
20
20
20
15
5
5
0
10
400
10
200
10
20
20
kHz max
kHz max
MHz max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
DAC Update Rate (Mode 1)
DAC Update Rate (Mode 2)
SCLK Frequency
SCLK High Pulsewidth
SCLK Low Pulsewidth
SYNC Falling Edge to SCLK Falling Edge Setup Time
DIN Setup Time
DIN Hold Time
SCLK Falling Edge to SYNC Rising Edge
Minimum SYNC High Time (Standalone Mode)
Minimum SYNC High Time (Daisy-Chain Mode)
BUSY Rising Edge to SYNC Falling Edge
18th SCLK Falling Edge to SYNC Falling Edge (Standalone Mode)
SYNC Rising Edge to SCLK Rising Edge (Daisy-Chain Mode)
SCLK Rising Edge to DOUT Valid (Daisy-Chain Mode)
RESET Pulsewidth
NOTES
1See Timing Diagrams in Figures 1 and 2.
2Guaranteed by design and characterization; not production tested.
3All input signals are specified with tr = tf = 5 ns (10% to 90% of DVCC) and timed from a voltage level of (VIL + VIH)/2.
4This is measured with the load circuit of Figure 3.
Specifications subject to change without notice.
–3–










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