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AD53042 PDF даташит

Спецификация AD53042 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «High Speed Window Comparator».

Детали детали

Номер произв AD53042
Описание High Speed Window Comparator
Производители Analog Devices
логотип Analog Devices логотип 

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AD53042 Даташит, Описание, Даташиты
a
High Speed Window Comparator
AD53042
FEATURES
–2 V to +7 V Input Voltage Range
Low VIN Bias Current (<100 nA)
Up to 5 V/ns Input Signal Tracking
Low Dispersion of ؎100 ps
28-Lead PLCC Package
APPLICATIONS
Automatic Test Equipment
Semiconductor Test Systems
Board Test Systems
FUNCTIONAL BLOCK DIAGRAM
GND
LEA LEA NC +VS NC GND
GND
VA
NC
VIN
NC
VB
GND
LATCH/OUTPUT
A
AD53042
LATCH/OUTPUT
B
GND
QA
QA
DGND
QB
QB
GND
GND
LEB LEB NC NC –VS GND
NOTE:
NOT THE ACTUAL PHYSICAL LAYOUT OF DEVICE.
NC = NO CONNECTION INSIDE PACKAGE.
PRODUCT DESCRIPTION
The AD53042 is an ultrahigh speed window comparator
with latch. It uses a high speed monolithic process to provide
high dc accuracy without sacrificing input voltage range.
On-chip connection of the common input eliminates the
contributions of a second bonding pad and package pin to
the input capacitance, resulting in a maximum input
capacitance of 2 pF.
The AD53042 employs a high precision differential input
stage with a common mode range of 9 V. Its complementary
digital outputs are fully ECL-compatible. The output stage is
capable of driving a 50 line terminated to –2 V. The device
also provides a latch function, allowing operation in track-hold
mode and can also be used to generate hysteresis.
3.0V
0V
MIN. POSITIVE
INPUT PULSE
2.8V
3.0V
MIN. NEGATIVE
INPUT PULSE
0.2V
0V
Figure 1. Typical Application Circuit
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999









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AD53042 Даташит, Описание, Даташиты
AD53042–SPECIFICATIONS (All specifications apply with TC = 40؇C to 100؇C and +VS = +7.75 V to +11.5 V;
–VS = –3.95 V to –7.7 V unless otherwise noted.)
Parameter
Min Typ Max
Units Test Conditions
POWER SUPPLIES
Positive Supply Currents
Negative Supply Current
Power Dissipation
DC INPUT CHARACTERISTICS
Offset Voltage (VOS)
VIN Bias Current
VA, VB Bias Current
Capacitance VIN, VA, VB
Voltage Range (VCM)
Differential Voltage (VDIFF)
Nonlinearity
VA/VB Interaction
BIAS CURRENT
Change vs. Comparator State
Nonlinearity
Tempco
–85
–10
–0.5 <0.1
–20
–VS + 2.7
–5
–1
–2
± 0.1
65 mA
mA
1.19 W
10
0.5
20
2
+VS – 2.5
9
5
0.1
mV
µA
µA
pF
V
V
mV
mV/V
No Load
No Load
No Load, +VS = +10 V, –VS = –5.2 V
CMV = 0 V
VIN = 0 V
VIN = 0 V
See Note 1
1 µA
2 µA
µA/°C
LATCH ENABLE INPUTS
Common-Mode Range
Differential Voltage
Logic “1” Current (LIH)
Logic “0” Current (LIL)
DIGITAL OUTPUTS
Logic “1” Voltage (VOH)
Logic “0” Voltage (VOL)
SWITCHING PERFORMANCE
Propagation Delay
Input to Output
Latch Enable to Output
Part-to-Part Skew
Change vs. Temperature
–2
0.4
–10
–0.98
1.2
±1
1
3
200
–1.5
2
1
V
V
µA
µA
V Q or Q, 50 to –2 V
V Q or Q, 50 to –2 V
ns
ns
ns
ps/°C
VIN = 2 V p-p, tPDR, tPDF, Figure 1, Note 2
DISPERSION
5 V p-p Input (All Edges)
5 V p-p Input (All Edges)
V Slew = 1 V/ns (All Edges)
V Slew = 1 V/ns (All Edges)
Minimum Pulsewidth
Edge Interaction
Duty Ratio
Comparator Interaction
± 100
± 175
± 50
± 50
<1
<200
<100
<100
ps 10%, 90% 0.5 V/ns, 3 V/ns
ps 10%, 90% 5 V/ns
ps 10%, 90% 3 V, 5 V
ps 20%, 80% 1 V
ns See Note 3
ps See Note 4
ps See Note 5
ps
NOTES
1Defined as change in VOS from –VS + 2.95 V to +VS – 2.75 V (throughout the range) after VA and VB are corrected for gain and offset using 0 V and 5 V.
2Propagation delay is measured from the input threshold crossing at the 50% point of a 0 V to 5 V input to the output Q and Q crossing.
3The minimum input pulsewidth that will maintain a 600 mV ECL swing on the output. The input is a 0 V to 3 V signal with a 3 V/ns rise and fall times. The input
pulsewidth is measured between the 2.8 V point of a positive input pulse and the 0.2 V of a negative input pulse. See Figure 2.
4Maximum Change in propagation delay as the input pulse is reduced from 50 ns to a 2 ns pulsewidth. 0 V to 3 V swing with 3 V/ns rise/fall time and 25% duty cycle.
5Maximum Change in propagation delay as the input pulse is reduced from 99% to a 1% duty cycle. 0 V to 3 V swing with 3 V/ns rise/fall time and 50 ns to 4.95 µs
pulsewidth, period = 5 µs.
Specifications subject to change without notice.
–2– REV. A









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AD53042 Даташит, Описание, Даташиты
AD53042
ABSOLUTE MAXIMUM RATINGS*
Power Supply Voltage
+VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12 V
–VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –8 V
+VS to –VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V
Inputs
VIN, VA, VB . . . . . . . . . . . . . . . +VS – 13.5 V, –VS + 13.7 V
LEA, LEA, LEB, LEB . . . . . . . . . +VS – 14 V, –VS +10 V
Currents
+VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 mA
–VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –75 mA
QA, QA, QB, QB . . . . . . . . . . . . . . . . . . –40 mA to +2 mA
Environmental
Operating Temperature (Ambient) . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature (Soldering, 20 sec) . . . . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Absolute maximum limits apply
individually, not in combination. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
The device must suffer no reliability degradation if any supply pin is either shorted
to ground or left floating for an indefinite periods of time during normal operation.
ORDERING GUIDE
Model
AD53042KRP
Package
Description
28-Lead PLCC
Shipment Method,
Quantity
Per Shipping
Container
Package
Option
Tube, 36 Pieces
P-28A
PIN CONFIGURATION
4 3 2 1 28 27 26
GND 5
VINA 6
NC 7
VINAB 8
NC 9
VINB 10
GND 11
PIN 1
IDENTIFIER
AD53042
TOP VIEW
(Not to Scale)
25 GND
24 QA
23 QA
22 DGND
21 QB
20 QB
19 GND
12 13 14 15 16 17 18
NC = NO CONNECT
VA
VB
VIN
tPDR
tPDF
QA
QA tPDR
QB
tPDF
QB
Figure 2. Timing Diagram I
LEA, LEB
LEA, LEB
VIN
VA
VB
QA
~1.2ns
QA
QB
QB
Figure 3. Timing Diagram II
If either of the latch enables, LEA or LEB are low, the output
follows the input. If LEA or LEB are high, the comparator out-
puts will be latched and they won’t change.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD53042 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–










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