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ADP3204JCP-REEL7 PDF даташит

Спецификация ADP3204JCP-REEL7 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs».

Детали детали

Номер произв ADP3204JCP-REEL7
Описание 3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs
Производители Analog Devices
логотип Analog Devices логотип 

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ADP3204JCP-REEL7 Даташит, Описание, Даташиты
a
3-Phase IMVP-II and IMVP-III
Core Controller for Mobile CPUs
ADP3204*
FEATURES
Pin Selectable 1-, 2-, or 3-Phase Operation
Static and Dynamic Current Sharing Characteristics
Backward Compatible to IMVP-II
Superior Load Transient Response with ADOPT®
Analog Devices’ Optimal Positioning Technology
Noise-Blanking for Speed and Stability
Synchronous Rectifier Control Extends Battery Life
Smooth Output Transition During VID Code Change
Cycle-by-Cycle Current Limiting
Hiccup or Latched Overload Protection
Transient-Glitch-Free Power Good
Soft Start Eliminates Power-On In-Rush Current Surge
Two-Level Overvoltage and Reverse Voltage
Protection
APPLICATIONS
IMVP-II and IMVP-III Core DC-to-DC Converters
Fixed Voltage Mobile CPU Core DC-to-DC Converters
Notebook/Laptop Power Supplies
Programmable Output Power Supplies
GENERAL DESCRIPTION
The ADP3204 is a 1-, 2-, or 3-phase hysteretic peak current
dc-to-dc buck converter controller dedicated to power a mobile
processor’s core. The optimized low voltage design is powered
from the 3.3 V system supply. The nominal output voltage is
set by a 5-bit VID code. To accommodate the transition time
required by the newest processors, the ADP3204 features
high speed operation to allow a minimized inductor size that
results in the fastest change of current to the output. To
further allow for the minimum number of output capacitors
to be used, the ADP3204 features active voltage positioning
with ADOPT optimal compensation to ensure a superior
load transient response. The output signals interface with a
maximum of three ADP3415 MOSFET drivers that are
optimized for high speed and high efficiency for driving both the
top and bottom MOSFETs of the buck converter. The
ADP3204 is capable of controlling the synchronous rectifiers to
extend battery lifetime in light load conditions.
HYSSET
DSHIFT
BSHIFT
DPRSHIFT
FUNCTIONAL BLOCK DIAGRAM
ADP3204
BOM
DPSLP
DPRSLP
VCC
HYSTERESIS
SETTING
AND
SHIFT-MUX
VR
PHASE
SPLITTER
VID4
VID3
VID2
VID1
VID0
BOM
DPSLP
DPRSLP
PWRGD
SD
CLIM
EN
CORE
CURRENT
SENSE
MUX
DPRSLP
VID
GEN
VID
MUX
AND
REG
5-BIT VID
DAC
AND
FIXED
REF
VR
VID TRANSIENT
DETECTOR AND
SHIFT SELECTOR
COREGD MONITOR
SS-HICCUP TIMER
AND OCP
PWRGD BLANKER
SR CONTROL
ENABLE UVLO-MAIN BIAS OVP AND RVP
PM MODULE
GND
OUT3
OUT2
OUT1
CS3
CS2
CS1
CS+
CS–
RAMP
REG
DACOUT
DACRAMP
COREFB
SS
DRVLSD
CLAMP
ADOPT is a trademark of Analog Devices, Inc.
*Protected by U.S.Patent No. 5,969,657; other patents pending.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002









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ADP3204JCP-REEL7 Даташит, Описание, Даташиты
ADP3204–SPECIFICATIONS1(0°C Յ TA Յ 100°C, High (H) = VCC, Low (L) = 0 V, VCC = 3.3 V, SD = H, VCOREFB =
VDAC (VDACOUT), VREG = VCS– = VVID = 1.25 V, CDACRAMP = 100 pF, ROUT1 = ROUT2 = ROUT3 =
100 k, COUT1
DPRSHIFT are
o=peCnOU,TB2 O=MC=OUTH3,=D1P0SLpPF,=CSHS,
= 0.047 F, RPWRGD
DPRLP = L, unless
= 680
otherwise
to 1.2 V, RCLAMP = 5.1
noted.) Current sunk
kto VCC, HYSSET, BSHIFT,
by a pin has a positive sign,
DSHIFT,
sourced
and
by a
pin
has
a
negative sign. Negative sign is disregarded for min and max values.
Parameter
SUPPLY-UVLO-SHUTDOWN
Normal Supply Current
UVLO Supply Current
Shutdown Supply Current
Symbol
ICC
ICCUVLO
ICCSD
UVLO Threshold
VCCH
VCCL
UVLO Hysteresis
Shutdown Threshold
(CMOS Input)
POWER GOOD
Core Feedback Threshold Voltage
VCCHYS
VSDTH
VCOREFBH
Power Good Output Voltage
(Open-Drain Output)
Masking Time2
SOFT START/HICCUP TIMER
Charge/Discharge Current
Soft Start Enable/Hiccup
Termination Threshold
Soft Start Termination/Hiccup
Enable Threshold
VID DAC
VID Input Threshold
(CMOS Inputs)
VID Input Current
(Internal Active Pull-Up)
Output Voltage
Accuracy
VPWRGD
tPWRGDMSK3
ISS
VSSEN
VSSTERM
VVID0..4
IVID0..4
VDAC
VDAC/VDAC
Settling Time
DACRAMP Inner Resistance5
tDACS4
RDACRAMP
Conditions
Min Typ Max
Unit
SD = L, 3.0 V VCC 3.6 V
SD = H
VCC ramping up, VSS = 0 V
VCC ramping down,
VSS floating
2.60
7 11
425
70
2.95
55
VCC/2
mA
A
A
V
V
mV
V
0.9 V < VDAC < 1.675 V
VCOREFB ramping up
VCOREFB ramping down
VCOREFB ramping up
VCOREFB ramping down
VCOREFB = VDACOUT
VCOREFB = 0.8 VDACOUT
1.12 VDAC
1.10 VDAC
0.88 VDAC
0.86 VDAC
0.95 VCC
0
100
1.14 VDAC
1.12 VDAC
0.90 VDAC
0.88 VDAC
VCC
0.8
V
V
V
V
V
V
s
VSS = 0 V
VSS = 0.5 V
VREG = 1.25 V,
VRAMP = VCOREFB = 1.27 V
VSS ramping down
VRAMP = VCOREFB = 1.27 V
VSS ramping up
VID0 to VID4 = L
See VID Code, Table 1
1.750 V VDAC 0.850 V
0.825 V VDAC 0.600 V
CDACRAMP = 100 pF
CDACRAMP = 1 nF
–55
1.2
200 300
1.70 2.00 2.25
VCC/2
85
0.600
1.750
–1.0
–8.5
3.5
25
10
+1.0
+8.5
A
A
mV
V
V
A
V
%
mV
s
s
k
–2– REV. 0









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ADP3204JCP-REEL7 Даташит, Описание, Даташиты
Parameter
CORE COMPARATOR
Input Offset Voltage (Ramp-Reg)
Input Bias Current
Output Voltage
(OUT1, OUT2, and OUT3)
Propagation Delay Time
Rise and Fall Time
(OUT1, OUT2, and OUT3)
Noise Blanking Time
Symbol
VCOREOS
IREG, IRAMP
VOUT_H
VOUT_L
tRMPOUT_PD6
tOUT_R7
tOUT_F7
tBLNK
CURRENT LIMIT COMPARATOR
Input Offset Voltage
Input Bias Current
Propagation Delay Time
VCLIMOS
ICS+, ICS–
tCLPD6
CURRENT SENSE
MULTIPLEXER
Trans-Resistance
Common-Mode Voltage Range
HYSTERESIS SETTING
Hysteresis Current
RCS1–CS+,
RCS2–CS+,
RCS3–CS+
IRAMP_H,
–ICS+_H
Hysteresis Reference Voltage
CURRENT LIMIT SETTING
Hysteresis Current
VHYSSET
ICS–
Conditions
VREG = 1.25 V
VREG = VRAMP = 1.25 V
VCC = 3.0 V
VCC = 3.6 V
TA = 25°C
TA = Full Range
OUT L-H Transition
OUT H-L Transition
VCS– = 1.25 V
VCS+ = 1.25 V
TA = 25° C
TA = Full Range
ADP3204
Min Typ Max Unit
± 1.5 mV
± 1 A
2.5 3.0 V
0 0.4 V
35 ns
45 ns
7 ns
7 ns
70 ns
130 ns
± 1 mV
–3 A
55 ns
65 ns
MUX switch is ON
MUX switch is OFF
VCS1 = VCS2 = VCS3
VREG = 1.25 V
VRAMP = 1.23 V
IHYSSET = 10 A
IHYSSET = 100 A
VRAMP = 1.27 V
IHYSSET = 10 A
IHYSSET = 100 A
0
–8
–85
8
85
VRAMP = 1.23 V
VREG = VCS– = VCOREFB = 1.25 V
VCS+ = 1.23 V
IHYSSET = 10 A
IHYSSET = 100 A
VCS+ = 1.27 V
IHYSSET = 10 A
IHYSSET = 100 A
VCS+ = 1.23 V, BOM = L
–27
–270
–18
–180
150
50
2
–10 –12
–100 –115
10
100
VDAC
12
115
–31.5 –36
–301.5 –333
–21.5 –25
–201.5 –223
M
V
A
A
A
A
V
A
A
A
A
REV. 0
–3–










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