DataSheet26.com

ADSP-2164KP-40 PDF даташит

Спецификация ADSP-2164KP-40 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «ADSP-2100 Family DSP Microcomputers».

Детали детали

Номер произв ADSP-2164KP-40
Описание ADSP-2100 Family DSP Microcomputers
Производители Analog Devices
логотип Analog Devices логотип 

39 Pages
scroll

No Preview Available !

ADSP-2164KP-40 Даташит, Описание, Даташиты
a
DSP Microcomputers with ROM
ADSP-216x
SUMMARY
16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory
Enhanced Harvard Architecture for Three-Bus
Performance: Instruction Bus and Dual Data Buses
Independent Computation Units: ALU, Multiplier/
Accumulator and Shifter
Single-Cycle Instruction Execution and Multifunction
Instructions
On-Chip Program Memory ROM and Data Memory RAM
Integrated I/O Peripherals: Serial Ports, Timer
FEATURES
25 MIPS, 40 ns Maximum Instruction Rate (5 V)
Separate On-Chip Buses for Program and Data Memory
Program Memory Stores Both Instructions and Data
(Three-Bus Performance)
Dual Data Address Generators with Modulo and
Bit-Reverse Addressing
Efficient Program Sequencing with Zero-Overhead
Looping: Single-Cycle Loop Setup
Double-Buffered Serial Ports with Companding Hardware,
Automatic Data Buffering and Multichannel Operation
Three Edge- or Level-Sensitive Interrupts
Low Power IDLE Instruction
PLCC and MQFP Packages
GENERAL DESCRIPTION
The ADSP-216x Family processors are single-chip micro-
computers␣ optimized␣ for␣ digital␣ signal␣ processing␣ (DSP)
and other high speed numeric processing applications. The
ADSP-216x processors are all built upon a common core with
ADSP-2100. Each processor combines the core DSP architec-
ture—computation units, data address generators and program
sequencer—with features such as␣ on-chip program ROM and
data memory RAM, a programmable timer and two serial ports.
The ADSP-2165/ADSP-2166 also adds program memory and
power-down mode.
This data sheet describes the following ADSP-216x Family
processors:
ADSP-2161/ADSP-2162/
ADSP-2163/ADSP-2164
ADSP-2165/ADSP-2166
Custom ROM-programmed DSPs:
ROM-programmed ADSP-216x
processors with power-down and
larger on-chip memories (12K Pro-
gram Memory ROM, 1K Program
Memory RAM, 4K Data Memory
RAM)
FUNCTIONAL BLOCK DIAGRAM
DATA ADDRESS
GENERATORS PROGRAM
SEQUENCER
DAG 1 DAG 2
MEMORY
PROGRAM
MEMORY
DATA
MEMORY
PROGRAM MEMORY ADDRESS
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
ARITHMETIC UNITS
ALU MAC SHIFTER
ADSP-2100 CORE
SERIAL PORTS
SPORT 0 SPORT 1
TIMER
EXTERNAL
ADDRESS
BUS
EXTERNAL
DATA
BUS
Fabricated in a high speed, submicron, double-layer metal
CMOS process, the highest-performance ADSP-216x proces-
sors operate at 25 MHz with a 40 ns instruction cycle time.
Every instruction can execute in a single cycle. Fabrication in
CMOS results in low power dissipation.
The ADSP-2100 Family’s flexible architecture and compre-
hensive instruction set support a high degree of parallelism.
In one cycle the ADSP-216x can␣ perform␣ all of␣ the␣ following
operations:
␣ Generate the next program address
␣ Fetch the next instruction
␣ Perform one or two data moves
␣ Update one or two data address pointers
␣ Perform a computation
␣ Receive and transmit data via one or two serial ports
Table I shows the features of each ADSP-216x processor.
The ADSP-216x series are memory-variant versions of the
ADSP-2101 and ADSP-2103 that contain factory-programmed
on-chip ROM program memory. These devices offer different
amounts of on-chip memory for program and data storage.
Table I shows the features available in the ADSP-216x series of
custom ROM-coded processors.
The ADSP-216x products eliminate the need for an external
boot EPROM in your system, and can also eliminate the need
for any external program memory by fitting the entire applica-
tion program in on-chip ROM. These devices thus provide an
excellent option for volume applications where board space and
system cost constraints are of critical concern.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999









No Preview Available !

ADSP-2164KP-40 Даташит, Описание, Даташиты
ADSP-216x
TABLE OF CONTENTS
SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 1
Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ARCHITECTURE OVERVIEW . . . . . . . . . . . . . . . . . . . . 3
Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
SYSTEM INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . 6
Program Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Memory Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Data Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Data Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
POWER-DOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power-Down Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Entering Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Exiting Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Low Power IDLE Instruction . . . . . . . . . . . . . . . . . . . . . . . 10
ADSP-216x Prototyping . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Ordering Procedure for ADSP-216x ROM Processors . . . . 10
Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SPECIFICATIONS–RECOMMENDED OPERATING
CONDITIONS
(ADSP-2161/ADSP-2163/ADSP-2165) . . . . . . . . . . . . . . 13
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . 13
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . 13
SPECIFICATIONS–SUPPLY CURRENT AND POWER
(ADSP-2161/ADSP-2163/ADSP-2165) . . . . . . . . . . . . . . 14
POWER DISSIPATION EXAMPLE . . . . . . . . . . . . . . . . . 15
ENVIRONMENTAL CONDITIONS . . . . . . . . . . . . . . . . 15
CAPACITIVE LOADING . . . . . . . . . . . . . . . . . . . . . . . . . 15
SPECIFICATIONS–
␣ ␣ (ADSP-2161/ADSP-2163/ADSP-2165) . . . . . . . . . . . . . . 16
TEST CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Output Disable Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Output Enable Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SPECIFICATIONS–RECOMMENDED OPERATING
CONDITIONS
(ADSP-2162/ADSP-2164/ADSP-2166) . . . . . . . . . . . . . . 17
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . 17
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . 17
SPECIFICATIONS–SUPPLY CURRENT AND POWER
(ADSP-2162/ADSP-2164/ADSP-2166) . . . . . . . . . . . . . . 18
POWER DISSIPATION EXAMPLE . . . . . . . . . . . . . . . . . 19
ENVIRONMENTAL CONDITIONS . . . . . . . . . . . . . . . . 19
CAPACITIVE LOADING . . . . . . . . . . . . . . . . . . . . . . . . . 19
TEST CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Output Disable Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Output Enable Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TIMING PARAMETERS
(ADSP-2161/ADSP-2163/ADSP-2165) . . . . . . . . . . . . . . 21
GENERAL NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TIMING NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
MEMORY REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . 21
CLOCK SIGNALS AND RESET . . . . . . . . . . . . . . . . . . . 22
INTERRUPTS AND FLAGS . . . . . . . . . . . . . . . . . . . . . . 23
BUS REQUEST/BUS GRANT . . . . . . . . . . . . . . . . . . . . . 24
MEMORY READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
MEMORY WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SERIAL PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
TIMING PARAMETERS
(ADSP-2162/ADSP-2164/ADSP-2166) . . . . . . . . . . . . . . 28
GENERAL NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
TIMING NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
MEMORY REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . 28
CLOCK SIGNALS AND RESET . . . . . . . . . . . . . . . . . . . 29
INTERRUPTS AND FLAGS . . . . . . . . . . . . . . . . . . . . . . . 30
BUS REQUEST/BUS GRANT . . . . . . . . . . . . . . . . . . . . . 31
MEMORY READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
MEMORY WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
SERIAL PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
PIN CONFIGURATIONS
68-Lead PLCC (ADSP-216x) . . . . . . . . . . . . . . . . . . . . . 35
80-Lead MQFP (ADSP-216x) . . . . . . . . . . . . . . . . . . . . . 36
PACKAGE OUTLINE DIMENSIONS
68-Lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
80-Lead MQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
–2– REV. 0









No Preview Available !

ADSP-2164KP-40 Даташит, Описание, Даташиты
Table I. ADSP-216x ROM-Programmed Processor Features
Feature
Data Memory (RAM)
Program Memory (ROM)
Program Memory (RAM)
Timer
Serial Port 0 (Multichannel)
Serial Port 1
Supply Voltage
Speed Grades (Instruction Cycle Time)
10.24 MHz (97.6 ns)
13.00 MHz (76.9 ns)
16.67 MHz (60 ns)
20.00 MHz (50 ns)
25 MHz (40 ns)
Packages
68-Lead PLCC
80-Lead MQFP
Temperature Grades
K Commercial, 0°C to +70°C
B Industrial, –40°C to +85°C
2161
1/2K
8K
2162
1/2K
8K
2163
1/2K
4K
2164
1/2K
4K
••••
••••
••••
5V
3.3 V
5V
3.3 V
••
••
••••
••••
••••
••••
ADSP-216x
2165 2166
4K 4K
12K 12K
1K 1K
••
••
••
5 V 3.3 V
••
••
••
Development Tools
The ADSP-216x processors are supported by a complete set of
tools for system development. The ADSP-2100 Family Devel-
opment Software includes C and assembly language tools that
allow programmers to write code for any of the ADSP-216x
processors. The ANSI C compiler generates ADSP-216x assem-
bly source code, while the runtime C library provides ANSI-
standard and custom DSP library routines. The ADSP-216x
assembler produces object code modules that the linker com-
bines into an executable file. The processor simulators provide
an interactive instruction-level simulation with a reconfigurable,
windowed user interface. A PROM splitter utility generates
PROM programmer compatible files.
EZ-ICE® in-circuit emulators allow debugging of ADSP-21xx
systems by providing a full range of emulation functions such
as modification of memory and register values and execution
breakpoints. EZ-LAB® demonstration boards are complete DSP
systems that execute EPROM-based programs.
The EZ-Kit Lite is a very low-cost evaluation/development
platform that contains both the hardware and software needed
to evaluate the ADSP-21xx architecture.
Additional details and ordering information are available in the
ADSP-2100 Family Software & Hardware Development Tools data
sheet (ADDS-21xx-TOOLS). This data sheet can be requested
from any Analog Devices sales office or distributor.
Additional Information
This data sheet provides a general overview of ADSP-216x
processor functionality. For detailed design information on the
architecture and instruction set, refer to the ADSP-2100 Family
User’s Manual, Third Edition, available from Analog Devices.
ARCHITECTURE OVERVIEW
Figure 1 shows a block diagram of the ADSP-216x architecture.
The processors contain three independent computational units:
the ALU, the multiplier/accumulator (MAC), and the shifter.
The computational units process 16-bit data directly and have
provisions to support multiprecision computations. The ALU
performs a standard set of arithmetic and logic operations;
division primitives are also supported. The MAC performs
single-cycle multiply, multiply/add, and multiply/subtract opera-
tions. The shifter performs logical and arithmetic shifts, normal-
ization, denormalization, and derive exponent operations. The
shifter can be used to efficiently implement numeric format control
including multiword floating-point representations.
The internal result (R) bus directly connects the computational
units so that the output of any unit may be used as the input of
any unit on the next cycle.
A powerful program sequencer and two dedicated data address
generators ensure efficient use of these computational units.
The sequencer supports conditional jumps, subroutine calls,
and returns in a single cycle. With internal loop counters and
loop stacks, the ADSP-216x executes looped code with zero
overhead—no explicit jump instructions are required to main-
tain the loop.
Two data address generators (DAGs) provide addresses for
simultaneous dual operand fetches (from data memory and
program memory). Each DAG maintains and updates four
address pointers. Whenever the pointer is used to access data
(indirect addressing), it is post-modified by the value of one of
four modify registers. A length value may be associated with
each pointer to implement automatic modulo addressing for
circular buffers. The circular buffering feature is also used by
the serial ports for automatic data transfers to (and from) on-
chip memory.
EZ-ICE and EZ-LAB are registered trademarks of Analog Devices, Inc.
REV. 0
–3–










Скачать PDF:

[ ADSP-2164KP-40.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
ADSP-2164KP-40DSP Microcomputers with ROMAnalog Devices
Analog Devices
ADSP-2164KP-40ADSP-2100 Family DSP MicrocomputersAnalog Devices
Analog Devices
ADSP-2164KP-40ADSP-2100 Family DSP MicrocomputersAnalog Devices
Analog Devices
ADSP-2164KP-40ADSP-2100 Family DSP MicrocomputersAnalog Devices
Analog Devices

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск